Semiconductor device and method of manufacturing the same

ABSTRACT

As conductive patterns  11 A to  11 D are formed burying in a insulating resin  10  and a conductive foil  20  is formed being half-etched, thickness of the device is made thin. As an electrode for radiation  11 D is provided, a semiconductor device superior in radiation is provided.

BACKGROUND OF THE INVENTION

1. Description of the Related Art

The present invention relates to a semiconductor device and a method formanufacturing the same, particularly a semiconductor device radiatingexcellently heat from the semiconductor device and a method formanufacturing the same.

2. Description of the Related Art

In recent years, use of IC package for portable equipment or small,hi-density mounting equipment progresses, and the conventional ICpackage and its concept of mounting are largely changing. These detailsare described in CSP technology, and mounting material and devicesupporting the technology—special issue of DENSHI ZAIRYO (p. 22,September 1998).

FIG. 9 is a structure adopting a flexible sheet 50 as an interposerboard, a copper foil pattern 51 is put on the flexible sheet throughadhesive, and an IC chip is fixed. There is a pad for bonding 53 formedat periphery of the IC chip as the conductive pattern 51. A pad forconnecting solder ball 54 is formed through a conductive path 51B formedin one body (integrally) with the pad for bonding 53.

At backside of the pad for connecting solder ball 54, an opening 56where the flexible sheet is opened, and through the opening 56, a solderball 55 is formed. The entire body is sealed with an insulating resin 58using the flexible sheet 50 as a board. Symbol 57 is a bonding wire.

When a semiconductor device is used as an example of circuit devices, aconventional package-type semiconductor device sealed by ordinarytransfer molding is popular. This is mounted on a printed substrate PS,as in FIG. 10.

In the package-type semiconductor device, the semiconductor chip 502 iscovered with a resin layer 503, and a lead terminal 504 for externalconnection is led out through the side of the resin layer 503.

However, the package-type semiconductor device 501 does not satisfy therequirements of down-sizing, thickness reduction and weight reduction,since the lead terminal 504 is led outside from the resin layer 503 andsince the overall size of the device is large.

Accordingly, various companies have tried various structures, competingwith others in order to realize down-sized, thin-walled and lightweightsemiconductor devices. Recently, CSP (chip-size packages) have beendeveloped, including wafer scale CSP of which the size is equal to thechip size and other CSP that are larger in some degree than the chipsize.

FIG. 11 shows a CSP 506 that is larger in some degree than the chipsize, in which the glass-epoxy substrate 505 serves as a supportingboard. As illustrated, a transistor chip T is mounted on the glass-epoxysubstrate 505, and this is described below.

On the surface of the glass-epoxy substrate 505, a first electrode 507,a second electrode 508 and a die pad 509 are formed; and on the backthereof, a first back electrode 510 and a second back electrode 511 areformed. Via the through-hole TH, the first electrode 507 is electricallyconnected to the first back electrode 510 and the second electrode 508to the second back electrode 511. The bare transistor chip T is attachedto the die pad 509. The emitter electrode of the transistor is connectedto the first electrode 507 via a bonding wire 512; and the baseelectrode thereof is to the second electrode 508 via another bondingwire 512. Further, a resin layer 513 is formed on the glass-epoxysubstrate 505 to cover the transistor chip T.

Though is has the glass-epoxy substrate 505, the CSP 506 is advantageousin that the extending structure from the chip T to the back electrodes510 and 511 for external connection is simple and the cost formanufacturing it is low, as compared with wafer scale CSP.

As in FIG. 10, the CSP 506 is mounted on a printed substrate PS.Electrodes and wires are formed on the printed substrate PS toconstitute electric circuits; and the CSP 506, the package-typesemiconductor device 501 or other devices such as chip resistor CR andchip capacitor CC are electrically connected and fixed to them.

The circuit thus formed on the printed substrate is fitted in varioussets.

A method for manufacturing the CSP is described below with reference toFIG. 12 and FIG. 13.

First, a glass-epoxy substrate 505 as a supporting board is prepared,and Cu foils 520 and 521 are attached to both surfaces thereof via aninsulating adhesive (FIG. 12A). Next, the Cu foils 520 and 521 arepartly coated with an etching-resistant resist 522, corresponding to thefirst electrode 507, the second electrode 508, the die pad 509, thefirst back electrode 510 and the second back electrode 511, and the Cufoil 520 and 521 are patterned. The patterning may be carried outseparately on the face and the back of the substrate (FIG. 12B).

Next, using a drill or laser, holes for through-holes TH are formed inthe glass-epoxy substrate, and these are plated to be through-holes TH.Via each through-hole TH, the first electrode 507 is electricallyconnected to the first back electrode 510, and the second electrode 508to the second back electrode 510 (FIG. 12C).

Though not shown, the first electrode 507 and the second electrode 508to be bonding posts are plated with Ni, the die pad 509 to be a diebonding post is plated with Au, and a transistor chip T is die-bonded tothe die pad 509.

Finally, the emitter electrode of the transistor chip T is connected tothe first electrode 507 and the base electrode thereof to the secondelectrode 508 via a bonding wire 512, and this is covered with a resinlayer 513 (FIG. 12D).

The process gives a CSP type electric device that has the supportingboard 505. In this process, a flexible sheet may be used for thesupporting board.

On the other hand, a method of manufacturing semiconductor devices on aceramic substrate is described with reference to the flowchart of FIG.13. A ceramic substrate as supporting board is prepared, andthrough-holes are formed therein. Next, both surfaces of the substrateare printed with a conductive paste to form face and back electrodesthereon, and these are sintered. After this, the process of this methodis the same as that of FIG. 12, until the thus-constructed structure iscovered with a resin layer. However, the ceramic substrate used hereinis extremely brittle and is readily cracked, different from flexiblesheets and glass-epoxy substrates, and is therefore problematic in thatit is not applicable to resin mold sealing. Accordingly, in thisprocess, the substrate with necessary elements mounted thereon is pottedwith a sealing resin, cured and flattened by polishing it, and finallythis is diced into individual chips with a dicing machine.

However in case of adopting a flexible sheet 50 as an interposer board,the flexible sheet formed on a rear surface of IC chip is veryexpensive, and there are problems that cost rises, thickness of thepackage becomes thick, and weight increases.

There is a problem that heat resistance from a back face of the IC chipto a back face of the package becomes large in a supporting boardbecause the supporting board comprises material other than metal. Forsaid supporting board, there is a flexible sheet, a ceramic board, or aprinted board. A heat conduction path comprising material superior inheat conduction is the bonding wire 57, the copper foil 51, and thesolder ball 55, the above supporting board has a structure not toradiate fully at driving. Therefore there is a problem that drivingcurrent does not flow fully because of temperature rise of IC chip atdriving.

In FIG. 11, the transistor chip T, the connecting means 507 to 512 andthe resin layer 513 are all indispensable constitutive elements forelectric connection to external units and for transistor protection.Heretofore, It has heretofore been difficult to provide a down-sized,thin-walled and lightweight circuit device that comprises theseconstitutive elements.

As so mentioned hereinabove, the glass-epoxy substrate 505 used assupporting board is naturally unnecessary. However, for bonding theelectrodes thereto in the process of manufacturing semiconductordevices, the supporting board is used, and the glass-epoxy substrate 505is indispensable in the manufacturing process.

For these reasons, the glass-epoxy substrate 505 is indispensably usedand it increases the production costs. In addition, since theglass-epoxy substrate 505 is thick, the circuit device comprising it isinevitably thick and is limited in point of down-sizing, thicknessreduction and weight reduction.

Further, the glass-epoxy substrate and the ceramic substrateindispensably require a step of forming through-holes through which theelectrodes formed on the two surfaces thereof are connected to eachother, and therefore manufacturing time is long and industrial-scalemass production is very difficult.

SUMMARY OF THE INVENTION

The invention is carried out in view of the above problems, and intendsto obtain a reliable semiconductor device having a small package and agood radiation characteristics.

The problems are solved having a pad provided facing to a bondingelectrode of a semiconductor chip, an electrode for radiation providedat an arranged area of said semiconductor chip, a insulating adhesionmeans provided on said electrode for radiation, said semiconductor chipfixed to said insulating adhesion means and electrically connected tosaid pad, and a insulating resin sealing (molding) said semiconductorchip so as to expose a back face of said pad and said insulatingadhesion means and to make in one body.

The problem is solved by that said insulating adhesion means comprisesan adhesion sheet or adhesive.

The problem is solved by that said semiconductor element is mounted inface-up type and that said pad and said bonding electrode are connectedwith fine metal wires (bonding wires).

The problem is solved by providing: plural bonding pads provided so asto surround one area; external connection electrodes extended in onebody with said bonding pads; an electrode for radiation provided at saidone area; a insulating adhesion means provided at said electrode forradiation; a semiconductor chip fixed through said insulating adhesionmeans; bonding wires connecting said bonding electrodes and said bondingpads on said semiconductor chip; and a insulating resin covering saidsemiconductor chip, said bonding pads, said electrode for radiation,said external connection electrodes, and said bonding wires and exposingback faces of said external connection electrodes, back faces of saidelectrodes for radiation, and back faces of said insulating adhesionmeans.

The problem is solved by providing: plural pads provided so as tosurround one area; an electrode for radiation provided at said one area;a insulating adhesion means provided at said electrode for radiation; asemiconductor chip fixed through said insulating adhesion means;connecting means connecting said bonding electrodes and said pads onsaid semiconductor chip; and a insulating resin covering saidsemiconductor chip, said bonding pads, and said connection means, andexposing back faces of said bonding pads and said insulating adhesionmeans; wherein the back face of said bonding pads are used as theexternal connection electrode.

The problem is solved by that said connection means comprises a bondingwire or brazing material.

The problem is solved by that a side face of said pad, bonding pad, orexternal connection electrode comprises a curved structure.

The problem is solved by preparing a conductive foil and half-etching sothat a conductive pattern is formed in projection shape;

-   -   providing an insulating adhesion means so as to fill in an        isolation trench formed by said half-etching;    -   fixing a semiconductor chip through said insulating adhesion        means so as to connect said conductive pattern electrically and;    -   providing a insulating resin at said conductive foil so as to        seal said semiconductor chip and said conductive pattern; and    -   removing a back face of said conductive foil so as to exposing a        back face of said insulating adhesion means and to separate as        said conductive pattern.

The problem is solved by preparing a conductive foil and half-etching sothat a conductive pattern comprising at least a pad and an electrode forradiation is formed in projection shape;

-   -   forming an insulating adhesion means so as to cover said        electrode for radiation and fill in an isolation trench adjacent        to the electrode;    -   fixing a semiconductor chip through said insulating adhesion        means so as to connect said conductive pattern electrically and;    -   providing a insulating resin at said conductive foil so as to        seal said semiconductor chip and said conductive pad; and    -   removing a back face of said conductive foil so as to exposing a        back face of said insulating adhesion means and to separate said        conductive pattern.

By providing the semiconductor device, it is possible to transfer heatof a semiconductor chip to an electrode for radiation. As a conductivepattern including the electrode for radiation is formed without using asupporting board, it is possible to decrease cost and to make thicknessof the semiconductor device thin.

The invention is carried out in view of the above problems, andcharacterized by comprising multiple conductive patterns for elementmounting thereon that is electrically separated from each other by aisolation trench, a thermosetting resin layer that fills the isolationtrench to cover the surface of the conductive pattern, a circuit elementfixed above the thermosetting resin layer, and an insulating resin thatcovers the circuit element to integrally support the conductive patternbonded to the thermosetting resin layer.

In the invention, the conductive foil to be a conductive patternfunctions by itself as a supporting board, and the conductive foilsupports the entire structure while the isolation trench is formed andwhile the circuit elements are mounted and covered with an insulatingresin. When the conductive foil is separated into individual conductivepatterns, the insulating resin functions as the supporting board.Accordingly, the minimum constitutive components—circuit element,conductive foil and insulating resin may be enough for the invention.This means that the invention does not require the supporting board thatis indispensable in the related art technology of manufacturing circuitdevices, and it reduces the production costs. In the invention, inaddition, the supporting board is unnecessary, the conductive pattern isembedded in the insulating resin, and the thickness of the insulatingresin and the conductive foil may be varied in any desired manner. Thuscharacterized by these advantages, still another advantage of theinvention is that it produces extremely thin-walled circuit devices.

The manufacturing method of the invention is characterized by comprisinga step of preparing conductive foil, and a step of forming a isolationtrench that does not exceed the thickness of the conductive foil in aregion thereof at least except the region to be a conductive patternthereby to form the conductive pattern, and a step of coating at least apart of the surface of the conductive pattern with a thermosetting resinlayer to fill the isolation trench, and a step of selectively removingthe thermosetting resin layer in the site to which the electrodes of acircuit element mounted on the conductive pattern are bonded, and a stepof fixing a circuit element above the conductive pattern and a step offorming a connecting means for electrically connecting the electrodes ofthe circuit element to the desired site of the conductive pattern, and astep of molding it with an insulating resin that covers the circuitelement and bonds to the thermosetting resin layer.

In the manufacturing method of the invention, since the conductivepattern is coated with a semi-cured thermosetting resin layerimmediately after its formation, the isolation trench can be completelyfilled with a liquid thermosetting resin of low viscosity, and theadhesion strength of the two is significantly increased. In addition,since the thermosetting resin layer covers the conductive patternimmediately after the conductive pattern has been formed, the surface ofthe conductive pattern is not oxidized in the subsequent heating stepfor die bonding or wire bonding, and the reliability of the devicesfabricated is high.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a semiconductor device of the invention.

FIG. 2 is a view for showing a method for manufacturing thesemiconductor device of the invention.

FIG. 3 is a view for showing a method for manufacturing thesemiconductor device of the invention.

FIG. 4 is a view for showing a method for manufacturing thesemiconductor device of the invention.

FIG. 5 is a view for showing a method for manufacturing thesemiconductor device of the invention.

FIG. 6 is a view for showing a method for manufacturing thesemiconductor device of the invention.

FIG. 7 shows a conductive pattern to be employed in the semiconductordevice of the invention.

FIG. 8 shows a semiconductor device of the invention.

FIG. 9 shows a conventional semiconductor device.

FIG. 10 shows a package structure of a conventional circuit device.

FIG. 11 shows a conventional circuit device.

FIG. 12 shows a method for manufacturing the conventional circuitdevice.

FIG. 13 shows flowcharts of conventional methods of manufacturingcircuit devices.

FIG. 14 shows a circuit device of the invention.

FIG. 15 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 16 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 17 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 18 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 19 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 20 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 21 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 22 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 23 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 24 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 25 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 26 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 27 shows a circuit device of the invention.

FIG. 28 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 29 shows a circuit device of the invention.

FIG. 30 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 31 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 32 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 33 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 34 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 35 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 36 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 37 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 38 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 39 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 40 shows a circuit device of the invention.

FIG. 41 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 42 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 43 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 44 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 45 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 46 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 47 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 48 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 49 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 50 is a view for showing a method for manufacturing the circuitdevice of the invention.

FIG. 51 shows an embodied circuit device of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment

First, a semiconductor device of the invention is described referring toFIG. 1. FIG. 1A is a plan view of the semiconductor device, and FIG. 1Bis a section view cut with A-A line.

FIG. 1 shows a insulating resin 10 buried with the following chips. Theyare pads 11A, conductive paths 11B in one-body with the pads 11A,external connection electrodes 11C provided at the other ends of theconductive paths 11B in one body with the conductive paths 11B. Furtheran electrode for radiating 11D provided at one area surrounded by theconductive patterns 11A, 11B, and 11C and a semiconductor chip 12provided on the electrode for radiating 11D are buried. Thesemiconductor chip 12 is fixed to the electrode for radiating 11Dthrough a insulating adhesion means AD, and is shown with dotted line inFIG. 1A.

A bonding electrode 13 of the semiconductor chip 12 and the pad 11A areelectrically connected through a bonding wire 14.

Side face of said conductive pattern 11A to 11D is etched withnon-anisotropy, and has a curved structure because of being formed withwet etching so as to generate anchor effect by the curved structure.

The structure consists of four materials: the semiconductor chip 12,plural conductive patterns 11A to 11C, the electrode for radiation 11D,the insulating adhesion means AD, and the insulating resin 10 buryingthem. In arranged area of the semiconductor chip 12, said insulatingadhesion means AD is formed on and between the conductive patterns 11Ato 11D, particularly is provided in the isolation trench 15 formed byetching so as to expose the back face. The insulating resin 10 seals allincluding these materials. Said pads 11A and semiconductor chip 12 aresupported by the insulating resin 10.

For the insulating adhesion means, adhesive comprising insulatingmaterial and insulating sheet of adhesiveness are desirable. As clear inthe description below, material is desirable to bond entire wafer and topattern by photolithography. For the insulating resin, thermosettingresin such as epoxy resin and thermoplastic resin such as polyimideresin and polyphenylenesulfide are used. All kinds of resin are used ifthey are resins hardening using a die and covering by dipping andpainting. For the conductive patterns 11A to 11D, conductive foil of Cuas main material, conductive foil of Al as main material, Fe—Ni alloy,laminated product of Cu—Al, or laminated product of Al—Cu—Al is used. Ofcourse, even other material is possible to use, particularly conductivematerial easy to etch and easy to evaporate by laser is desirable.Considering half-etching ability, forming ability of plating, andthermal stress, conductive material of Cu as main material formed byrolling is desirable.

The invention has a characteristic to prevent remove of the conductivepattern because the insulating resin 10 and the insulating adhesionmeans AD are filled into even said isolation trench 15. By carrying outnon-anisotropic etching using dry etching or wet etching for etching,the side faces of pads 11A are made into curved structure so as togenerate anchor effect. As the result, the structure that the conductivepatterns 11A to 11D do not come out (remove) from the insulating resin10 (package) is realized.

Further the back faces of the conductive patterns 11A to 11D expose atthe back face of the package. Accordingly the back face of the electrode11D for radiation is fixed with the electrode on the mounting board. Thestructure can radiate heat generating from the semiconductor chip 12 onthe electrode of the mounting board, can prevent temperature rise of thesemiconductor chip 12, and can increase driving current of thesemiconductor chip 12. The electrode for radiation 11C and thesemiconductor chip 12 may be connected electrically.

Because the conductive patterns 11A to 11D are supported by insulatingresin 10 in the semiconductor device, a supporting board is not need.This construction is a characteristic of the invention. As described atthe prior art, the conductive path of the conventional semiconductordevice is supported by a supporting board (flexible sheet, printedboard, or ceramic board), or supported by a lead frame, the constructionwhich is not need originally is added. However the circuit deviceconsists of necessary minimum components and does not need thesupporting board so that the device has a characteristic to be thin,light, and inexpensive because of low material cost.

At the back face of the package, the conductive patterns 11A to 11Dexpose. By covering brazing material such as solder for example, at thearea, the brazing material can get wet thickly because area of theelectrode for radiation 11D is broad. Therefore brazing material of theback face of the external connection electrode 11C is not wet at theelectrode of the mounting board at fixing on the mounting board, so itis assumed to become bad connection.

To solve that, a insulating film 16 is formed at the back face of thesemiconductor device 15. Circles of dotted line shown FIG. 1A show theexternal connection electrodes 11C and electrodes for radiation 11Dexposing from the insulating film 16. That is, as the insulating film 16covers portions except the circles and size of circle portions issubstantially same size, thickness of brazing material formed here issubstantially same. This is similar as after solder printing and afterreflow. This is similar about conductive paste such as Ag, Au, Ag—Au,Ag—Pd and soon. By the structure, bad quality of the electricalconnection means 23 are depressed. An exposing portion 17 of theelectrode for radiation 11D may be formed larger than exposing size ofthe external connection electrode 11C considering radiation of thesemiconductor chip. As all of the external connection electrodes 11C aresubstantially same size, all area of the external connection electrodes11C maybe exposed at entire area, and a part of the back face of theelectrode for radiation 11D may be exposed from the insulating film 16with substantially same size.

By providing the insulating film 16, it is possible to extend theconductive path provided at the mounting board to the back face of thesemiconductor device. Although the conductive path provided at themounting board side is generally arranged going around the fixed area ofsaid semiconductor device, forming said insulating film 16 can arrangewithout going around. Further as the insulating resin 10 and theinsulating adhesion means AD project from the conductive pattern, a gapis formed between the conductive path of the mounting board side and theconductive pattern so as to prevent short.

Second Embodiment

The method for manufacturing shows the method for manufacturing of thesemiconductor chip 15 shown in FIG. 1, and FIG. 2 to FIG. 6 are sectionviews corresponding to A-A line of FIG. 1A.

First, a conductive foil 20 is provided as FIG. 2. Thickness thereof isdesirably 10 μm to 300 μm, here rolled copper foil of 70 μm is used.Next on the front face of the conductive foil 20, a conductive film 21or a photo resist is formed as etching-resist.

The pattern is same pattern as the pads 11A in FIG. 11A, the conductivepaths 11B, the external connection electrode 11C, and the electrodes forradiation 11D. In the case of using the photo resist instead of theconductive film 21, a conductive film such as Au, Ag, Pd or Ni is formedat a part corresponding to at least pad in the lower layer of the photoresist. This is provided to make bonding possible. (Refer FIG. 2 aboutthe above.)

Next, a conductive foil 20 is half-etched through said conductive film21 or photo resist. Depth of etching may be thinner than thickness ofconductive foil 20. The thinner the depth of etching, forming the finerpattern is possible.

By half-etching, conductive patterns 11A to 11D appear at surface of theconductive foil 20 in projection shape. As above-mentioned, here Cu foilformed by roll and made of Cu as main material is used for theconductive foil 20. For the conductive foil, conductive foil made of AL,conductive foil made of Fe—Ni alloy, layered product of Cu-AL, orlayered product of Al—Cu—Al may be used. Especially the layered productof Al—Cu—Al prevents bend appearing by difference of coefficient ofthermal expansion.

At part corresponding to dotted line of FIG. 1, a insulating adhesionmeans AD is formed. The insulating adhesion means AD is provided at anisolation trench 15 between the electrode of radiation 11D and theexternal connection electrode 11C, at an isolation trench 15 between theelectrode of radiation 11D and the conductive path 11B, and on them.(Refer FIG. 3 about the above.)

Next, a semiconductor chip 12 is fixed at one area providing theinsulating adhesion means AD, a bonding electrode 13 of thesemiconductor chip 12 and the bonding pad 11A are electricallyconnected. In the figure, as the semiconductor chip 12 is mounted inface up type, a bonding wire 14 is used for the connection means.

In the bonding, the bonding pads 11A are in one body with the conductivefoil 20, and further a back face of the conductive foil 20 contacts faceof table of a bonding machine because the back face is flat. Thereforeif the conductive foil 20 is entirely fixed to the bonding table, thereis not position shift of the bonding pads 11A, and bonding energy istransferred efficiently to the bonding wire 14 and the bonding pads 11A.Therefore the bonding wire 14 is connected improving fixing strengththereof. Fixing the bonding table is possible by providing plural vacuumsuction holes at entire face of the table for example. The conductivefoil 21 may be pushed from upper side.

The semiconductor chip is mounted without using the supporting board,and height of the semiconductor chip 12 is arranged low as thickness asthe supporting board. Therefore it is possible that thickness of thepackage is made thin. (Refer to FIG. 4 about the above.)

An insulating resin 10 is formed so as to cover the conductive patterns11A to 11D formed by half-etched, the semiconductor chip 12, and thebonding wire 14. For the insulating resin, both of thermoplasticity andthermosetting property may be used.

Transfer molding, injection molding, dipping, or painting realizes theresin. For the resin material, thermosetting resin such as epoxy resinis realized by transfer molding and thermoplastic resin such as liquidpolymer and polyphenylenesulfide is realized by injection molding.

In the mode for carrying out, thickness of the insulating resin isadjusted so as to cover 100 μm upper from an upper limit face of thebonding wire 14. The thickness may be made thick or thin consideringstrength of the semiconductor device.

In the injection of resin, as the conductive patterns 11A to 11D are inone body with the sheet-shape conductive foil 20, position of theconductive patterns 11A to 11D does not shift at all as long as theconductive foil 20 does not shift.

As above-mentioned, in the insulating resin 10, the conductive patterns11A to 11D formed as projection and the semiconductor chip 12 areburied, and the conductive foil 20 of lower part than the projectionexposes at the back face. (Refer FIG. 5 about the above.)

Next, the conductive foil 20 exposing at the back face of the insulatingresin 10 is removed and the conductive patterns 11A to 11D areindividually separated.

Various methods are considered for the separating process, that is, theback face may be separated removing by etching or grinding by polishingor grinding. Both of them may be used. There is a problem that shavingsof the conductive foil 20 and bur-shape rolled metal extended thin tooutside cut into the insulating resin 10 and the insulating adhesionmeans AD at grinding till the insulating resin 10 exposes for example.Therefore separating the conductive pattern by etching, the device isformed without that metal of the conductive foil 20 cuts into theinsulating resin 10 existing between the conductive pattern 11A to 11Dand the insulating adhesion means AD. Thus short between the conductivepattern 11A to 11D of fine interval is prevented. (Refer FIG. 5 aboutthe above.)

In the case that plural units becoming the semiconductor device 15 areformed, dicing process is added after the separating process.

Although the units are separated individually using the dicing machinehere, it is possible by chocolate breaking, pressing, and cutting.

Here the insulating film 16 is formed on the conductive patterns 11A to11D exposing at the back face separated and is patterned so as toexposes the parts shown in circle of dotted line of FIG. 1A, and afterthat, is diced along an arrow shown in FIG. 6 to be each of thesemiconductor devices.

The solder 21 may be formed before or after dicing.

The above method for manufacturing realizes a light, thin, short, smallpackage where a semiconductor chip buried in insulating material.

The insulating adhesion means AD shown in FIG. 3 and FIG. 4 may bebonded at the stage of wafer before the semiconductor 12 is individuallyseparated. That is, if sheet-shaped adhesive is formed on the back faceof wafer at the stage wafer and the wafer is cut with the sheet atdicing, the process forming the insulating adhesion means AD on theconductive foil 20, shown in FIG. 3, is not need.

FIG. 7 shows a conductive pattern formed on the conductive foil 20. Herefour units are formed vertically, and horizontally eight units areformed so as to have a shape like lead frame.

Symbols 30A and 30B are marks showing position of dicing line, andbetween two lines dicing blade is arranged so as to separate thesemiconductor device individually. Symbols 31 and 32 are indexing marks.L shape lines shown with symbols 33A and 33B show corner portion of thechip. At the corner portion, the corner of the chip is arranged andfixed.

Next, effect generating by the above method for manufacturing isdescribed.

First, as the conductive pattern is half-etched and supported in onebody of the conductive foil, a board used for supporting past isremoved.

Second, as the pad half-etched to make projection is formed on theconductive foil, it is possible to make the pad fine. Therefore it ispossible to make width and gap of the pad narrow so as to form a smallpackage in plan size.

Third, as the device consists of necessary minimum components: theconductive pattern, the semiconductor chip, the connection means, andsealing material, useless material is removed so as to realize thinsemiconductor device extremely depressing cost.

Fourth, as the pads are formed becoming projection by half-etching andindividually separated after sealing, tie bar and hanging lead are notneed. Therefore forming and cutting tie bar (hanging lead) is not needat all in the invention.

Fifth, as the conductive foil is removed from the back face of theinsulating resin after the conductive pattern becoming the projection isburied in the insulating resin and is separated, bur of resin generatingbetween leads as the conventional lead framed is removed.

Sixth, as the semiconductor is fixed to the electrode for radiationthrough the insulating adhesive means and the electrode for radiationexposes from the back face thereof, heat generating from thesemiconductor device is efficiently radiated from the back face thereof.By mixing the under-fill material with filler such as Si oxide film andaluminum oxide, radiation of the device is more improved. By unifyingthe filler size, it is possible that gap between the semiconductor chip12 and the conductive pattern is kept uniform.

Third Embodiment

FIG. 8 shows the semiconductor device 42. FIG. 8A is a plan view of thedevice, and FIG. 8B is a section view cut by A-A line.

Although the pad 11A is formed in one body with the conductive path 11Band the external connection electrode 11C in FIG. 1, here the back faceof the pad 11A becomes the external connection electrode.

As the back face of the pad 11A is formed in rectangle, the patternexposing from the insulating film 16 is formed in same pattern as saidrectangle. The trenches 43 are formed so that the electrode 11D forradiation and chip 12 can be adhered appropriately by filling theinsulating adhesion means into said trenches. Thereby the electrode 11Dfor radiation is divided to plural.

As clear from the above description, in the invention, even theconductive foil (or conductive foil) where the conductive pattern formedin island shape has thickness is buried in the insulating adhesion meansand the insulating resin. As the electrode for radiation positioning atthe back face of the semiconductor chip, it is possible to improveradiation of the semiconductor chip. Further as the supporting board isnot used, it is possible to realize a thin and light package.

The device consists of necessary minimum components of the conductivepattern, the semiconductor chip, and the insulating resin, and becomes acircuit device useless for resources. Therefore extra components do notexist till completion, and a semiconductor device decreasing costthereof extremely.

Fourth Embodiment

The fourth embodiment of the circuit device of the invention isdescribed with reference to FIG. 14.

The circuit device of the invention comprises multiple conductivepatterns for element mounting thereon that is electrically separatedfrom each other by a isolation trench, a thermosetting resin layer thatfills the isolation trench to cover the surface of the conductivepattern, a circuit element fixed on the thermosetting resin layer, andan insulating resin that covers the circuit element to integrallysupport the conductive pattern bonded to the thermosetting resin layer.

FIG. 14 shows a circuit device 153 having a conductive pattern 151embedded in a thermosetting resin layer 150A, in which a circuit element152 is fixed on the conductive pattern 151 and the conductive pattern151 are supported by an insulating resin 150B bonded to thethermosetting resin layer 150A.

This structure comprises four elements, the circuit element 152, themultiple conductive patterns 151, the thermosetting resin layer 150A toenvelop the conductive pattern 151, and the insulating resin 150B thatbonds to the resin layer 150A. In this, the conductive patterns 151 areseparated by a isolation trench 161 filled with the thermosetting resinlayer 150A. The conductive pattern 151 is supported by the thermosettingresin layer 150A and the insulating resin 150B.

For the thermosetting resin layer 150A that characterizes the invention,a thermosetting resin such as epoxy resin is used. The resin fills theisolation trench 161 and covers the surface of the conductive pattern151. To form the thermosetting resin layer 150A, a liquid materialprepared by dissolving a thermosetting resin in an organic solvent iscast over the isolation trench 161 and the conductive pattern 151,semi-cured to evaporate away the organic solvent, and then finallycured. Preferably, a filler such as silica or alumina is added to thethermosetting resin layer 150A to reduce the thermal expansiondifference between the layer 150A and the conductive pattern 151. Ingeneral, the thermal expansion coefficient of epoxy resin is 50 ppm/°C.; that of epoxy resin containing the filler is from 15 to 30 ppm/° C.;and that of copper to form the conductive pattern 151 is 18 ppm/° C.Therefore, the filler may remove the thermal expansion mismatch betweenepoxy resin and copper.

Since the thermosetting resin layer 150A is filled into the isolationtrench 161 while it is a liquid of low viscosity, it may well adhere tothe inner walls of the isolation trench 161, as compared with epoxyresin to be transfer-molded, and the adhesion strength between the twomay be increased significantly.

Another method may be employed for forming the thermosetting resin layer150A, which comprises pressing a semi-sheet-like film of thermosettingresin such as epoxy resin against the conductive pattern 151 followed byfinally curing it thereon under heat to thereby cover the conductivepattern 151 and fill the isolation trench 161 with the resin.

For the insulating resin 150B, any of thermosetting resin such as epoxyresin, or thermoplastic resin such as polyphenylene sulfide can be used.Not limited to these, the insulating resin may be any and every resinthat may be solidified in molds, or may be applied to semiconductor bydipping or coating. However, in consideration of its bonding strength tothe thermosetting resin layer 150A, resin of the same type is preferredfor the two. Therefore, in this, thermosetting resin such as epoxy resinis used for the insulating resin 150B.

For the conductive pattern 151, for example, any of conductive foilconsisting essentially of Cu, conductive foil consisting essentially ofAl, or conductive foil consisting essentially of Fe—Ni alloy or the likecan be used. Needless to say, any other conductive material may also beused. Especially etchable conductive materials and conductive materialsevaporable by laser are preferred.

For connecting the circuit element 152 to any other element, a bondingwire 155 is used in a face-up structure, or a conductive ball of solder,a flattenable conductive ball or other solder material is used in aface-down structure. The connecting means is selected depending on thetype of the circuit element 152 and the mounting method thereof.

The conductive pattern 151 to which is fitted the bonding wire 155 orsolder is selectively exposed out of the thermosetting resin layer 150A,and the exposed surface of the conductive pattern 151 is covered with aconductive film 154. For the conductive film 154, usable is any of Ag,Au, Pt or Pd. The back electrode 156 is formed on the conductive pattern151 through low-vacuum or high-vacuum coating, plating or sintering thatincludes vapor deposition, sputtering, CVD and the like. The backelectrode 156 is formed by selectively exposing out a predeterminedregion of the conductive pattern 151 with masking the other regionthereof with a resist layer 157, followed by applying a conductivematerial such as solder to the exposed region, and the back electrodesare protruding electrodes.

In this circuit device, the conductive pattern 151 is supported by thethermosetting resin layer 150A and the insulating resin 150B, andtherefore does not require a supporting board for it. This constitutioncharacterizes the invention. As so described hereinabove with referenceto the related art, the conductive paths in conventional circuit devicesare supported by a supporting board or by a lead frame, and they requiresuperfluous structures that are naturally unnecessary. However, thecircuit device of the invention is composed of the least necessaryconstitutive elements, not requiring a supporting board, and it may bethinned and low-priced.

Another advantage of the circuit device of the invention is that thethermosetting resin layer 150A therein covers the circuit element 152and fills the isolation trench 161 between the conductive patterns 151for individual insulation.

In the circuit device, the thermosetting resin layer 150A and theinsulating resin 150B integrally support the structure in such a mannerthat the insulating resin 150B covers the circuit element 152 and thethermosetting resin layer 150A fills the isolation trench 161 betweenthe conductive pattern 151 with the back thereof only exposed outside.

The circuit element 152 is fixed onto the thermosetting resin layer 150Athat covers the conductive pattern 151, via an insulating adhesive 158,and the circuit element 152 is therefore electrically insulated from theconductive pattern 151. As a result, the conductive pattern 151 to beformed below the circuit element 152 may be a fine pattern of any form,and the latitude in wiring with the pattern significantly increases.Each electrode pad of the circuit element 152 is connected to theconductive film 154 that is formed on a part of the conductive pattern151 around it and serves as a bonding pad, via the bonding wire 155.Accordingly, the back electrode 156 may be formed on the conductivepattern 151 below the circuit element 152, and this realizes anequivalently two-layered wiring structure.

Exposing the back of the conductive path characterizes the invention.The back of the conductive path may be connected to external elements,therefore not requiring through-holes TH as in the conventionalstructure in FIG. 12.

Moreover, since the circuit element 152 is disposed on the thinthermosetting resin layer 150A and fixed thereto via the insulatingadhesive 158, the heat generated by the circuit element 152 may betransferred to the substrate via the thermosetting resin layer 150A andvia the conductive pattern 151. In particular, the structure iseffective for semiconductor chips that require heat radiation when thedriving current increases.

In this circuit device, the surface of the isolation trench 161 issubstantially on the same level as the surface of the conductive pattern151. This structure characterizes the invention. This does not have adifference in level for the back electrodes 510 and 511 as in FIG. 12.Therefore, the circuit device 153 is characterized in that it acceptshorizontal movement.

In another embodiment, a UV-curable resin may be used in place of thethermosetting resin layer 150A. Concretely, a UV-curable resin isapplied onto the structure, using a vacuum laminator, and then curedthrough exposure to UV rays and development to thereby form a cured UVresin film that covers the desired surface of the isolation trench 161and the conductive pattern 151. UV-curable resin is a type of epoxyresin, and is therefore effective like the thermosetting resin layer150A.

One embodiment of manufacturing the circuit device of the invention isdescribed with reference to FIG. 15.

The method of the invention comprises a step of preparing conductivefoil and forming a isolation trench that does not exceed the thicknessof the conductive foil in a region of the conductive foil at leastexcept the region to be a conductive pattern that has a number of partsto carry circuit elements mounted thereon, thereby to form theconductive pattern in multiple blocks; a step of coating the isolationtrench and the conductive pattern with a thermosetting resin; a step ofexposing a predetermined surface of the conductive pattern through laseretching; a step of forming a conductive film selectively on the exposedconductive pattern; a step of fixing circuit elements on thethermosetting resin layer; a step of forming a connecting means forelectrically connecting the electrode of each circuit element to adesired part of the conductive pattern; a step of common-molding it withan insulating resin to collectively cover the circuit element on everyelement-mounting part and to fill the isolation trench; a step ofremoving the conductive foil in the thickness part with no isolationtrench formed therein; a step of sticking the multiple blocks to anadhesive sheet via the insulating resin of each block; a step ofmeasuring the characteristics of the circuit element on eachelement-mounting part of each block attached to the adhesive sheet; anda step of dicing the insulating resin into the individualelement-mounting parts of each block attached to the adhesive sheet.

The flowchart of FIG. 15 does not correspond to the method as above. Inthis, the two flows of Cu foil and half-etching are to form a conductivepattern. In the next flow of thermosetting resin, the surface of theisolation trench and the conductive pattern is covered with athermosetting resin. In the two flows of die bonding and wire bonding, acircuit element is fixed onto each element-mounting part, and itselectrodes are connected to the conductive pattern. In the flow oftransfer molding, an insulating resin is applied to the structure bycommon molding. In the flow of removing the back Cu foil, the conductivefoil in the thickness part with no isolation trench formed therein isetched away. In the flow of back processing, the electrodes of theconductive pattern exposed to the back are processed. In the flow ofadhesive sheet, multiple blocks are attached to an adhesive sheet. Inthe flow of measurement, the circuit elements built in the structure arechecked and graded. In the flow of dicing, the insulating resin is dicedinto individual circuit devices.

Next described are the steps of the invention with reference to FIG. 14and FIGS. 16 to 26.

As in FIG. 16 to FIG. 18, the first step comprises preparing conductivefoil 160, and forming a isolation trench 161 that does not exceed thethickness of the conductive foil 160 in a region of the conductive foil160 at least except the region to be a conductive pattern 151 that has anumber of parts to carry circuit elements 152 mounted thereon, therebyto form the conductive pattern 151 in multiple blocks.

In this step, a sheet of conductive foil 160 is prepared, as in FIG.16A. The material for the conductive foil 160 is selected inconsideration of solder adhesiveness thereto and the bondability and theplatability thereof. For example, conductive foil of essentially Cu,conductive foil of essentially Al, or conductive foil of essentiallyFe—Ni alloy or the like can be used.

The thickness of the conductive foil is preferably from 10 μm to 300 μmor so in view of the easiness in etching it. In this, a copper foilhaving a thickness of 125 μm is used. Basically, however, the conductivefoil may be thicker than 300 μm or thinner than 10 μm. As will bementioned hereinunder, the thickness of the conductive foil 160 may besuch that it accepts the formation of a shallow isolation trench 161therein.

The sheet-like conductive foil sheet 160 may be prepared in the form ofa roll having a predetermined width, for example, 45 mm, and this may befed to each step. Alternatively, strips of conductive foil 160 cut tohave a predetermined size may be prepared and these may be fed to eachstep.

Concretely, four or five blocks 162 are formed on a conductive foilstrip 160, spaced from each other as in FIG. 16B. Each block shall havea large number of element-mounting parts to be formed therein. A slit163 is formed between the neighboring blocks 162, and this acts toabsorb the stress of the conductive foil 160 in thermal treatment in themolding step, etc. Index holes 164 are formed at predetermined intervalsin the upper and lower peripheries of the conductive foil 160, and theseare for determining location in every step.

Next, a conductive pattern 151 is formed in every block.

As in FIG. 17, a photoresist (etching-resistant mask) PR is formed onthe Cu foil 160, and this is patterned to partly expose the conductivefoil 160 except the region to be a conductive pattern 151. Next, as inFIG. 18A, the conductive foil 160 is selectively etched via thephotoresist PR.

The depth of the isolation trench 161 formed by the etching is, forexample, from 20 to 30 μm, and the side wall thereof is roughenedthrough oxidation or chemical polishing so as to increase itsadhesiveness to the thermosetting resin layer 150A.

The side wall of the isolation trench 161 is schematically drawn to bestraight in the figures, but may have any other structure depending onthe method of removing the photoresist for forming it. The method ofphotoresist removal includes wet etching, dry etching, laser evaporationand dicing. In wet etching, the etchant to be employed is essentiallyferric chloride or cupric chloride, and the conductive foil is dipped inor showered with the etchant. In wet etching, in general, the conductivefoil is etched non-anisotropically, and its etched side wall istherefore curved.

In dry etching, the conductive foil may be etched anisotropically ornon-anisotropically. At present, it is said that Cu could not be removedthrough reactive ion etching, but it may be removed through sputtering.Depending on the condition of sputtering, Cu may be etchedanisotropically or non-anisotropically.

In laser evaporation, a laser ray may be directly applied to theconductive foil to form the isolation trench 161. In this case, the sidewall of the isolation trench 161 formed may be straight.

FIG. 18B is a schematic view of the conductive pattern 151. Thiscorresponds to an enlargement of one block 162 shown in FIG. 16B. Oneblack section corresponds to one element-mounting part 165, and theblack sections constitute the conductive pattern 151. One block 162 hasa large number of element-mounting parts 165 that are aligned in amatrix of 5 lines and 10 rows, and the same conductive pattern 151 isformed for every element-mounting part 165. A frame pattern 166 isformed around every block, and registration marks 167 for dicing areprovided inside it, spaced in some degree from it. The frame pattern 166is for engagement of the patterned conductive foil with a mold, andafter back etching of the conductive foil 160, it reinforces theinsulating resin 150B.

The second step of the invention is to form the thermosetting resinlayer 150A that covers the isolation trench 161 and the surface of theconductive pattern 151, as in FIG. 19.

This step characterizes the invention, in which a thermosetting resinsuch as epoxy resin is used for the thermosetting resin layer 150A, andthis fills the isolation trench 161 and covers the surface of theconductive pattern 151. For forming the thermosetting resin layer 150A,a liquid material prepared by dissolving a thermosetting resin in anorganic solvent is cast over the isolation trench 161 and the conductivepattern 151, heated at 80° C. to 100° C. to semi-cure it withevaporating away the organic solvent, and then further heated at 150° C.to 170° C. for about 1.5 hours to finally cure it. Accordingly, thesemi-cured thermosetting resin is in B-stage, and it is not as yetfinally set.

Preferably, a filler such as silica or alumina is added to thethermosetting resin layer 150A to reduce the thermal expansiondifference between the layer 150A and the conductive pattern 151. Ingeneral, the thermal expansion coefficient of epoxy resin is 50 ppm/°C.; that of epoxy resin containing the filler is from 15 to 30 ppm/° C.;and that of copper to form the conductive pattern 151 is 18 ppm/° C.Therefore, the filler may remove the thermal expansion mismatch betweenepoxy resin and copper.

Since the thermosetting resin for the layer 150A is filled into theisolation trench 161 while it is a liquid of low viscosity, it may welladhere to the inner walls of the isolation trench 161, as compared withepoxy resin to be transfer-molded, and the adhesion strength between thetwo may be increased significantly. The depth of the isolation trench161 is about 60 μm for ensuring the necessary adhesion strength in therelated art. However, since the adhesion strength in this embodiment isincreased, the depth of the isolation trench 161 may be a half of it inthe related art as above, concretely from 20 to 30 μm, and this producesan advantage in that the conductive pattern 151 may be a finer pattern.

Another method may be employed for forming the thermosetting resin layer150A, which comprises pressing a semi-cured film sheet of thermosettingresin such as epoxy resin against the conductive pattern 151 followed byfinally curing it thereon under heat to thereby cover the conductivepattern 151 and fill the isolation trench 161 with the resin. Thesurface of the thermosetting resin film is covered with a cushion sheet,and pressed under 100 kg/cm² under heat at 150° C. to 170° C., and theresin is finally cured while its melt covers the isolation trench 161and the surface of the conductive pattern 151.

In this step, it is desirable to roughen the inner wall of the isolationtrench 161 for further enhancing the adhesion strength between theisolation trench 161 and the thermosetting resin layer 150A. For it, forexample, the inner wall of the isolation trench 161 is oxidized orchemically polished with an organic acid etchant. For the organic acidetchant, for example, usable is Mec's CZ-8100 can be used. The patternedconductive foil is dipped in the etchant for a few minutes to roughenthe surface thereof to a degree of from 1 to 2 μm or so. Through thetreatment, the inner wall of the isolation trench 161 is roughened, andthe adhesion strength between the isolation trench 161 and thethermosetting resin layer 150A is thereby increased.

In another embodiment of this step, a UV-curable resin may be used inplace of the thermosetting resin for the layer 150A. Concretely, aUV-curable resin is applied onto the patterned conductive foil, using avacuum laminator, and then cured through exposure to UV rays anddevelopment to thereby form a cured UV resin layer that covers thedesired surface of the isolation trench 161 and the conductive pattern151. This embodiment simplifies the process since it covers the nextthird step.

The third step of the invention comprises exposing the surface of apredetermined area of the conductive pattern 151 by removing thethermosetting resin layer 150A thereon through laser etching, as in FIG.20.

In this step, the thermosetting resin layer 150A is partly selectivelyremoved through laser etching for direct patterning to thereby partlyexpose the conductive pattern 151. For the laser, carbon dioxide laseris preferred, but excimer laser and YAG laser may also be used. When theresin still remains on the bottom of the opening after its removalthrough laser evaporation, it is removed, for example, through wetetching with sodium permanganate or ammonium persulfate or through dryetching with excimer laser.

The fourth step of the invention comprises forming a conductive film 154on the exposed conductive pattern 151, as in FIG. 21.

The remaining thermosetting resin layer 150A serves as a mask, and theexposed conductive pattern 151 is plated with any of gold, silver orpalladium by electrolytic plating or electroless plating to have theconductive film 154 formed thereon. The conductive film 154 serves as abonding pad.

For example, a silver film adheres to gold wires and to solder. Inaddition, fine Au wires may adhere to such a conductive film of silver.Therefore, the conductive film 154 accepts wire bonding, and its oneadvantage is that the film may serve directly as a bonding pad.

The fifth step of the invention comprises fixing a circuit element 152on the thermosetting resin layer 150 in the element-mounting part 165thereof with an insulating adhesive 158, and forming a connecting meansfor electrically connecting the electrode of the circuit element 152 inthe element-mounting part 165 to a desired part of the conductivepattern 151, as in FIG. 22.

The circuit element 152 includes semiconductor elements such astransistors, diodes, IC chips. Though thick, face-down semiconductorelements such as CSP or BGA may also be mounted on the structure.Multiple IC chips may be piled up or may be arrayed in plane toconstitute the circuit element 152.

In the illustrated embodiment, a bare IC chip 152 is fixed onto thethermosetting resin layer 150A with an insulating adhesive 158 such asepoxy resin, and the electrodes of the IC chip 152 are connected to thecorresponding conductive films 154 formed on the conductive pattern 151around the element-mounting part 165, via a bonding wire 155 bonded tothe two by thermal ball bonding or ultrasonic wedge bonding.

A large number of conductive patterns 151 are integrated in every block162. Therefore, the advantage of this step is that the circuit elements152 may be efficiently mounted on the conductive patterns throughphysical fixation and wire bonding.

The sixth step of the invention comprises common-molding the circuitelements 152 on the element-mounting parts 163 with an insulating resin150B that collectively covers the elements and bonds to thethermosetting resin layer 150A filled in the isolation trench 161, as inFIG. 23.

The isolation trench 161 and the conductive pattern 151 are covered withthe thermosetting resin layer 150A in the previous step, and theinsulating resin 150B covers the circuit element 152 and bonds to thethermosetting resin layer 150A remaining in the isolation trench 161 andon the surface of the conductive pattern 151, as in FIG. 23A. Inparticular, when thermosetting resin of the same type such as epoxyresin is used for both the thermosetting resin layer 150A and theinsulating resin 150B, the two have an affinity for each other andtherefore produce a higher adhesion strength between them. For furtherenhancing the adhesion strength, it is desirable that the surface of thethermosetting resin layer 150A is subjected to UV irradiation or plasmairradiation to activate the polar group of the resin in the surface ofthe layer 150A prior to the molding treatment with the insulating resin150B. As a result, the thermosetting resin layer 150A is integrated withthe insulating resin 150B to more firmly support the conductive pattern151.

The treatment of this step may be realized by transfer molding,injection molding or dipping. Regarding the type of the resin material,thermosetting resin such as epoxy resin may be transfer-molded; andthermoplastic resin such as polyimide resin or polyphenylene sulfide maybe injection-molded.

In this step of transfer molding or injection molding, theelement-mounting parts 163 in one block 162 are all put in one commonmold, and they are common-molded with one insulating resin 150, as inFIG. 23B. In this step, therefore, the amount of the resin to be usedmay be reduced significantly, as compared with that in conventionaltransfer molding, and common molds may be used.

The thickness of the insulating resin 150B that covers the surface ofthe conductive foil 160 is so controlled that it is about 100 μm or sofrom the top of the circuit element 152. This thickness may be increasedor decreased in consideration of the mechanical strength of the resinlayer.

This step is characterized in that the conductive foil 160 to form theconductive pattern 151 serves as a supporting board before it is coatedwith the insulating resin 150B. In the related art technology, theconductive paths 507 to 511 are formed by the use of the supportingboard 505 that is naturally unnecessary, as in FIG. 11. In theinvention, however, the conductive foil 160 that serves as thesupporting board is a material necessary for electrodes. Accordingly,the invention is advantageous in that the necessary constitutivematerials may be reduced to the minimum and the production costs aretherefore reduced.

Since the depth of the isolation trench 161 does not exceed thethickness of the conductive foil sheet 160, the conductive pattern 151of the conductive foil 160 is not individually separated. Accordingly,the sheet-like conductive foil 160 can be handled as one sheet as awhole, and when it is molded with the insulating resin 150B, it may bereadily transferred and put into a mold.

The seventh step of the invention comprises removing the conductive foil160 in the thickness part not having the isolation trench 161 formedtherein, as in FIG. 23A.

In this step, the back of the conductive foil 160 is chemically and/orphysically removed to individually separate the conductive pattern 151.This may be carried out, for example, through polishing, cutting,etching or metal evaporation with laser.

In one example of this process, the entire back of the conductive foil160 is cut with a polishing machine or a cutting machine to a depth ofabout 100 μm or so, whereby the thermosetting resin layer 150A isexposed out of the isolation trench 161. The face to be exposed outthrough the treatment is represented by the dotted line in FIG. 23A. Asa result, the conductive pattern 151 is individually separated to have athickness of about 30 μm. Apart from it, the entire back of theconductive foil 160 may be wet-etched before the thermosetting resinlayer 150A is exposed out, and then it may be cut with a polishing orcutting machine so that the thermosetting resin layer 150A is exposedout. In still another embodiment, the entire back of the conductive foil160 may be wet-etched to the depth of the dotted line whereby thethermosetting resin layer 150A may also be exposed out.

In the structure thus processed, the back of the conductive pattern 151is exposed out of the thermosetting resin layer 150A. Specifically, theface of the thermosetting resin layer 150A filled in the isolationtrench 161 is substantially on the same level as that of the conductivepattern 151. Accordingly, the circuit device 153 of the invention doesnot have a difference in level for the back electrodes 510 and 511 as inFIG. 12 that indicates a related art technology, and this ischaracterized in that, when other elements are mounted thereon, itaccepts horizontal movement for self-alignment based on the surfacetension of solder or the like.

Further, the back of the conductive pattern 151 is processed to obtainthe final structure as in FIG. 14. Concretely, a part of the conductivepattern 151 to form electrodes is selectively exposed out while theother part thereof is coated with a resist layer 157, and a conductivematerial such as solder is applied to it to form back electrodes 156,thereby completing a final circuit device.

The eighth step of the invention comprises sticking the multiple blocks162 to an adhesive sheet 180 via the insulating resin 150B of eachblock, as in FIG. 24.

In the previous step, the back of the conductive foil 160 is etched andthen it is divided into individual blocks 162. Since the blocks areconnected to each other via the thermosetting resin layer 150A and theinsulating resin 150B and via the remaining part of the conductive foil160, they may be individually separated from each other by mechanicallypeeling them from the remaining part of the conductive foil 160, notusing a dicing mold.

In this step, the periphery of an adhesive sheet 180 is stuck to astainless metal ring frame 181, and four blocks 162 are stuck to thecenter part of the adhesive sheet 180 via the insulating resin 150B ofeach block in such as manner that they are spaced from each other so asnot to interfere with the blades for dicing. For the adhesive sheet 180,a UV sheet (by Lintec) may be used. In place of it, however, any otherdicing sheet may be used since the insulating resin 150B ensures goodmechanical strength of each block 162.

The ninth step of the invention comprises measuring the characteristicsof the circuit element 152 on each element-mounting part 165 of eachblock 162 attached to the adhesive sheet 180, as in FIG. 25. As somentioned hereinabove, the circuit elements in every block are moldedall at a time with the thermosetting resin layer 150A and the insulatingresin 150B.

On the back of each block 162, the back electrodes 156 are exposed out,and the element-mounting parts 165 are aligned in matrix quite similarlyto the initial conductive pattern 151, as in FIG. 14. A probe is appliedto the back electrode 156 exposed out of the insulating resin 150B thatcovers the conductive pattern 151, and the characteristic parameters ofthe circuit element 152 on every element-mounting part 165 areindividually measured for checking the quality of each device. Theinferior devices are marked with a magnetic ink or the like.

In this step, the circuit devices 153 on the element-mounting parts 165are integrally supported by the insulating resin 150B as a whole inevery block 162, and are not individually separated from each other.Accordingly, the multiple blocks 162 attached to the adhesive sheet 180may be vacuum-sucked to the stand of a tester, and each block 162 ismoved in the machine direction and in the cross direction, like thearrow, by the size of the element-mounting part 165 at a predeterminedpitch, whereby the circuit devices 153 on the element-mounting parts inan extremely large number of blocks 162 may be checked all at a time.This process does not require the discrimination of the back and theface of each circuit device and the recognition of the electrodeposition that are needed in the related art technology. In addition, theprocess enables simultaneous treatment of a large number of multipleblocks 162 all at a time, and therefore the test time for it may besignificantly shortened.

The tenth step of the invention comprises dicing the thermosetting resinlayer 150A and the insulating resin 150B of the blocks 162 attached tothe adhesive sheet 180 into the individual element-mounting parts 165,as in FIG. 26.

In this step, the multiple blocks 162 attached to the adhesive sheet 180are vacuum-sucked to the stand of a dicing machine, and thethermosetting resin layer 150A and the insulating resin 150B on theisolation trench 161 are diced with a dicing blade 169 along the dicingline 170 between the element-mounting parts 165 to thereby individuallyseparate the circuit devices 153 from each other.

In this step, the dicing blade 169 completely cut the thermosettingresin layer 150A and the insulating resin 150B to the depth that reachesthe surface of the adhesive sheet, whereby the element-mounting parts165 are completely separated from each other. In this step, theregistration marks 167 made inside the frame pattern around every blockin the first step are recognized, and based on these, the block is dicedinto individual circuit elements. As well known, each block is firstdiced along every machine-direction dicing line 170, then the stand isrotated by 90 degrees, and the thus-diced pieces are again diced alongthe cross-direction dicing line 170.

In this step, the dicing line 170 has only the thermosetting resin layer150A filled in the isolation trench 161 and the insulating resin 150Bthat overlies it, and therefore the dicing blade is worn little andproduces little metal burr. The process enables extremely accuratedicing into precision devices.

Even after this step, or that is, even after diced, the individualcircuit devices are not scattered since they are supported by theadhesive sheet 180. In the subsequent taping step, therefore, they areworked efficiently. Concretely, the circuit devices that are integrallysupported by the adhesive sheet 180 are screened, and only the gooddevices thus selected are released from the adhesive sheet 180 andcollected in the collection holes of a carrier tape by the action of asuction collet. Accordingly, the process is characterized in that themicrostructured circuit devices are not scattered at all throughout theprocess and they are well held on a tape.

One embodiment of the manufacturing method of the invention has beendescribed hereinabove. Needless to say, the order of the inspection stepand the dicing step may be reversed. This is because the diced devicesare all supported on the adhesive sheet 180 and can be tested with noproblem. One matter to be specifically taken into consideration in thiscase is that the diced devices are supported by the adhesive sheet 180and the deformation of the adhesive sheet 180 must be taken intoconsideration in the step of inspecting the devices.

In the invention, the conductive foil to be a conductive patternfunctions by itself as a supporting board, and the conductive foilsupports the entire structure while the isolation trench is formed andwhile the circuit elements are mounted and covered with an insulatingresin. When the conductive foil is separated into the individualconductive pattern, the insulating resin functions as the supportingboard. Accordingly, the minimum constitutive components—circuit element,conductive foil and insulating resin may be enough for the invention.This means that the invention does not require the supporting board thatis indispensable in the related art technology of manufacturing circuitdevices, and it reduces the production costs. In the invention, inaddition, the supporting board is unnecessary, the conductive pattern isembedded in the insulating resin, and the thickness of the insulatingresin and the conductive foil may be varied in any desired manner. Thuscharacterized by these advantages, still another advantage of theinvention is that it produces extremely thin-walled circuit devices.

Further, since the isolation trench and the conductive pattern arecovered with a thermosetting resin, still another advantage of theinvention is that the thermosetting resin of low viscosity may have anincreased adhesion strength to the isolation trench. In addition, thethermosetting resin and the insulating resin have an affinity to eachother as they are the resins of the same type, and they may firmly bondto each other to realize good resin encapsulation for integratedsemiconductor package structures. Accordingly, even though the structureof the invention comprises a one-face molded conductive pattern, itcompletely overcomes the drawback of peeling of the thermosetting resinlayer from the insulating resin at the isolation trench. In addition,since the adhesion strength between the two resins in the structure ofthe invention is increased, the depth of the isolation trench may befrom 20 to 30 μm or so, or that is, a half of ordinary isolationtrenches. This produces still another advantage in that the conductivepattern may be a finer pattern.

Further, since the conductive pattern is covered with a thermosettingresin layer and a conductive film, its surface is protected fromoxidation. In particular, when copper foil is used, its surface is moresurely protected from oxidation.

Further, the conductive pattern may be designed in any desired mannerbelow circuit elements. The structure of the invention could not acceptmulti-layered wiring. However, the single-layered wiring structure ofthe invention realizes high wiring density like multi-layered wiringstructures.

In the manufacturing method of the invention, since the conductivepattern is coated with a semi-cured thermosetting resin layerimmediately after its formation, the isolation trench can be completelyfilled with a liquid thermosetting resin of low viscosity, and theadhesion strength of the two is significantly increased. In addition,since the thermosetting resin layer covers the conductive patternimmediately after the conductive pattern has been formed, the surface ofthe conductive pattern is not oxidized in the subsequent heating stepfor die bonding or wire bonding, and the reliability of the devicesfabricated is high.

Further, the thermosetting resin layer may be readily selectivelyremoved through laser etching, and the remaining thermosetting resinlayer may serve as a mask in plating the exposed conductive pattern witha conductive film. Accordingly, the manufacturing process is simplified.

When an insulating resin is filled into isolation trenches by ordinarytransfer molding, it could not be fully filled thereinto since itsviscosity is high. Therefore, the problem with the case is that theadhesion strength between the isolation trench and the insulating resinis not good and the insulating resin readily peels from the conductivepattern. The invention has solved the problem by using a semi-curedthermosetting resin of low viscosity, and the adhesion strength betweenthe isolation trench and the thermosetting resin layer in the inventionis increased. Specifically, since the thermosetting resin and theinsulating resin have an affinity to each other as they are the resinsof the same type, and the adhesion strength of the conductive pattern tothe thermosetting resin layer and to the insulating resin is greatlyincreased.

Further, since multiple blocks are attached to the adhesive sheet 180,the microstructured circuit devices are not scattered throughout theprocess of the invention where they are processed, and still anotheradvantage of the manufacturing method that the invention has realizedherein is that its mass-producibility is extremely good.

In addition, still another advantage of the invention is that themultiple blocks attached to the adhesive sheet can be processed in theinspecting step and the dicing step all at a time. Accordingly, in theinspection step, an extremely large number of circuit devices on theelement-carrying parts in multiple blocks may be inspected all at atime, and the step does not require the discrimination of the back andthe face of each circuit device and the recognition of the electrodeposition that are needed in the related art technology. In addition, theprocess enables simultaneous treatment of a large number of multipleblocks all at a time, and therefore the test time for it may besignificantly shortened. Further, the advantage of the dicing step isthat the dicing lines can be rapidly and surely recognized based on theregistration marks made in every block. In the dicing step, theinsulating resin layer alone is diced but the conductive foil is notdiced. In the step, therefore, the life of the dicing blade to be usedis prolonged, and the dicing treatment does not produce metal burr thatis inevitable in dicing conductive foil.

Fifth Embodiment

The fifth mode of the invention is a modification of the forth mode ofthe invention, in which the seventh step is modified in the mannermentioned below. In this embodiment, the back of the conductive patternis exposed out to constitute an external electrode, as illustrated.

Characterizing this embodiment, the external electrode 256 is formed ofthe conductive pattern 251 of the conductive foil 260 that is below theisolation trench 261, and this protrudes from the back of thethermosetting resin layer 250A, as in FIG. 27A. Accordingly, theexternal electrode 256 is a protruding electrode by using a part of theconductive foil 260, having a height of about 100 μm. The solder 257applied to the external electrode 256 runs around the side wall of theexternal electrode 256, and enhances the bonding strength of theexternal electrode 256 to the conductive paths of the printed circuitboard, as in FIG. 27A.

The conductive pattern 251 with heat-radiating semiconductor chips orthe like fixed thereon may constitute a heat sink along with theexternal electrode 256, having the same thickness as that of theconductive foil 260, and this embodiment may produce a structure ofextremely low heat resistance.

Further, when a thin gold plate layer 257′ is formed on the surface ofthe external electrode 256 as in FIG. 27B, then it realizes a land gridarray (LGA) structure. Therefore, the embodiment of this case does notrequire additional plating to form protruding electrodes.

The seventh step of this embodiment comprises removing the conductivefoil 260 from the area of the isolation trench 261, as in FIG. 28.

In this step, a resist layer 259 is applied to the back of theconductive foil 260 except the area corresponding to the isolationtrench 261, and the conductive foil 260 is chemically etched with asolution of ferric chloride or the like via the mask of the resist layer259. As a result, the conductive foil 260 in the area of the isolationtrench 261 is selectively removed and the bottom of the thermosettingresin layer 250A is exposed out. Since the bonding part of theconductive foil 260 now not having the isolation trench 261 therein isremoved, the conductive pattern 251 is individually separated to havethe thickness of the conductive foil 260.

As a result, the back of the conductive pattern 251 that is almostfilled with thermosetting resin layer 250A is exposed out, and theexternal electrode 256 forms a protruding electrode that protrudes byabout 100 μm from the back of the thermosetting resin layer 250A.Specifically, the external electrode 256 means that it is formed as aprotruding electrode in the bonding area of the conductive foil 260 nothaving the isolation trench 261 therein.

Further, the back of the external electrode 256 is processed to obtainthe final structure as in FIG. 27. Concretely, the external electrode256 is coated with a conductive material such as solder, and the circuitdevice is thus completed. In this case, the conductive material such assolder spreads to cover the side wall of the external electrode 256, andthe conductive paths of the printed circuit board are fixed to both thesurface and the side wall of the external electrode to increase thebonding strength between them.

Further, when the external electrode 256 is coated with a thin goldplate layer 257′, it realizes a land grid array (LGA) structure.

This back treatment does not require a mask since only the externalelectrode 256 is exposed out of the thermosetting resin layer 250A andthe insulating resin 250B, and its advantage is that the treatment isextremely simple.

The exposure of the back of the conductive pattern in this embodimentcharacterizes the invention. The back of the conductive pattern servesas the external electrode 256 to be connected with external units, and,in addition, the external electrode 256 acts as a heat sink and aprotruding electrode.

Sixth Embodiments

The sixth mode of the circuit device of the invention is described withreference to FIG. 29.

The circuit device of the invention comprises a multiple conductivepatterns for element mounting thereon that are electrically separatedfrom each other by a isolation trench, a thermosetting resin layer thatfills the isolation trench to cover the surface of the conductivepattern, a circuit element fixed on a desired region of the conductivepattern exposed out of the thermosetting resin layer, an insulatingresin that covers the circuit element to integrally support theconductive pattern bonded to the thermosetting resin layer, and anexternal electrode formed by exposing the back of the conductivepattern.

FIG. 29 shows a circuit device 353 having a conductive pattern 351almost embedded in a thermosetting resin layer 350A, in which a circuitelement 352 is fixed on the conductive pattern 351 and the conductivepattern 351 is supported by an insulating resin 350B bonded to thethermosetting resin layer 350A.

This structure comprises four types of elements, the circuit elements352A and 352B, the multiple conductive patterns 351A, 351B and 351C, thethermosetting resin layer 350A to envelop the conductive patterns 351A,351B and 351C, and the insulating resin 350B that bonds to the resinlayer 350A. In this, the conductive pattern 351 is separated by theisolation trench 361 filled with the thermosetting resin layer 350A. Theconductive pattern 351 is supported by the thermosetting resin layer350A and the insulating resin 350B.

For the thermosetting resin layer 350A that characterizes the invention,a thermosetting resin such as epoxy resin is used. The resin fills theisolation trench 361 and covers the surfaces of the conductive patterns351A, 351B and 351C. To form the thermosetting resin layer 350A, aliquid material prepared by dissolving a thermosetting resin in anorganic solvent is cast over the isolation trench 361 and the conductivepatterns 351A, 351B and 351C, semi-cured to evaporate away the organicsolvent, and then finally cured. Preferably, a filler such as silica oralumina is added to the thermosetting resin layer 350A to reduce thethermal expansion difference between the layer 350A and the conductivepatterns 351A, 351B and 351C. In general, the thermal expansioncoefficient of epoxy resin is 50 ppm/° C.; that of epoxy resincontaining the filler is from 15 to 30 ppm/° C.; and that of copper toform the conductive patterns 351A, 351B and 351C is 18 ppm/° C.Therefore, the filler may remove the thermal expansion mismatch betweenepoxy resin and copper.

Since the thermosetting resin for the layer 350A is filled into theisolation trench 361 while it is a liquid of low viscosity, it may welladhere to the inner walls of the isolation trench 361, as compared withepoxy resin to be transfer-molded, and the adhesion strength between thetwo may be increased significantly.

Another method may be employed for forming the thermosetting resin layer350A, which comprises pressing a semi-cured film sheet of thermosettingresin such as epoxy resin against the conductive patterns 351A, 351B and351C followed by finally curing it thereon under heat to thereby coverthe conductive patterns and fill the isolation trench 361 with theresin.

For the insulating resin 350B, any of thermosetting resin such as epoxyresin, or thermoplastic resin such as polyimide resin or polyphenylenesulfide may be employed. Not limited to these, the insulating resin maybe any and every resin that may be solidified in molds, or may beapplied to semiconductor by dipping or coating. However, inconsideration of its bonding strength to the thermosetting resin layer350A, resin of the same type is preferred for the two. Therefore, inthis, thermosetting resin such as epoxy resin is used for the insulatingresin 350B.

For the conductive pattern 351, for example, any of conductive foilconsisting essentially of Cu, conductive foil consisting essentially ofAl, or conductive foil consisting essentially of Fe—Ni or the like alloymay be employed. Needless to say, any other conductive material may alsobe used. Especially preferred are etchable conductive materials andconductive materials evaporable by laser.

For connecting the circuit element 352 to any other element, any of abonding wire 355A, a conductive ball of solder, a flattenable conductiveball, a solder 355B, a conductive paste 355C of Ag or the like, aconductive film or an anisotropic conductive resin may be used. Theconnecting means is selected depending on the type of the circuitelement 352 and the mounting mode thereof. For example, for a basersemiconductor element, a bonding wire is selected for connecting thesurface electrode and the conductive pattern 351; and for CSP, a solderball or a solder bump is selected. For the chip resistor and the chipcapacitor, selected is a solder 355B or a silver paste. A semiconductordevice package such as BGA may be mounted on the conductive pattern 351with no problem. In this case, solder is selected for the connectingmeans.

When the circuit element is fixed to the conductive pattern 351A notrequiring electric connection between them, an insulating adhesive isselected for the fixation. On the other hand, when the fixation requireselectric connection, a conductive film is employed for it. In this case,at least one conductive film will be enough.

For the conductive film, any of Ag, Au, Pt or Pd is usable. Theconductive film may be formed through low-vacuum or high-vacuum coating,plating or sintering that includes vapor deposition, sputtering, CVD andthe like.

For example, Ag adheres to Au and also to solder. Accordingly, when theback of a chip is coated with Au, the chip may be directly bonded to theconductive path 351A coated with an Ag film, Au film or solder film, orthe chip may also be bonded thereto via solder. The conductive film maybe the uppermost layer of a multi-layered conductive film. For example,two layers of Ni film and Au film may be formed in that order on the Cuconductive pattern 351A; or three layers of Ni film, Cu film and solderfilm may be formed in that order thereon; or two layers of Ag film andNi film may be formed in that order thereon. Apart from these, there aremany different types of conductive films and many different laminatestructures thereof, but the description relating to them is omittedherein.

The external electrode 356 characterizes the invention, and it is formedof the conductive foil 360 of the conductive pattern 351 that remainsbelow the isolation trench 361. This protrudes from the back of thethermosetting resin layer 350A. Accordingly, a part of the conductivefoil 360 forms the external electrode 356, which is a protrudingelectrode having a height of about 100 μm. Therefore, the solder 357applied to the external electrode 356 runs around the side wall of theexternal electrode 356, and enhances the bonding strength of theexternal electrode 356 to the conductive paths of the printed circuitboard, as in FIG. 29A.

The conductive pattern 351A with heat-radiating semiconductor chips orthe like fixed thereon may constitute a heat sink along with theexternal electrode 356A, and this embodiment may produce a structure ofextremely low heat resistance.

Further, when a thin gold plate layer 358 is formed on the surface ofthe external electrode 356 as in FIG. 29B, then it realizes a land gridarray (LGA) structure. Therefore, the embodiment of this case does notrequire additional plating to form protruding electrodes.

In this circuit device, the conductive pattern 351 is supported by thethermosetting resin layer 350A and the insulating resin 350B, andtherefore does not require a supporting board for it. This constitutioncharacterizes the invention. As so described hereinabove with referenceto the related art, the conductive paths in conventional circuit devicesare supported by a supporting board or by a lead frame, and they requiresuperfluous structures that are naturally unnecessary. However, thecircuit device of the invention is composed of the least necessaryconstitutive elements, not requiring a supporting board, and it may bethinned and low-priced.

Another advantage of the circuit device of the invention is that thethermosetting resin layer 350A therein covers the circuit element 352and fills the isolation trench 361 between the conductive pattern 351for individual insulation.

In the circuit device, the thermosetting resin layer 350A and theinsulating resin 350B integrally support the structure in such a mannerthat the insulating resin 350B covers the circuit element 352 and thethermosetting resin layer 350A fills the isolation trench 361 betweenthe conductive pattern 351 with the back alone of the conductive pattern351 exposed outside.

Exposing the back of the conductive pattern characterizes the invention.The back of the conductive pattern is connected to the externalelectrode 356 and serves for further connection to other externalelements. In addition, the external electrode 356 acts as a heat sinkand a protruding electrode.

In addition, when the circuit element is directly bonded to thestructure via a conductive film of solder, Au, Ag or the like, the heatgenerated by the circuit element 352A may be transferred to thesubstrate via the conductive pattern 351A since the back of theconductive pattern 351 is exposed out to form the external electrode356A. Accordingly, the structure of this embodiment is effective forsemiconductor chips that require heat radiation when the driving currentincreases.

In another embodiment, a UV-curable resin may be used in place of thethermosetting resin layer 350A. Concretely, a UV-curable resin isapplied onto the structure, using a vacuum laminator, and then curedthrough exposure to UV rays and development to thereby form a cured UVresin film that covers the desired surface of the isolation trench 361and the conductive pattern 351. UV-curable resin is a type of epoxyresin, and is therefore effective like the thermosetting resin layer350A.

One embodiment of manufacturing the circuit device of the sixth mode ofthe invention is described with reference to FIG. 30.

The method of the invention comprises a step of preparing conductivefoil and forming a isolation trench that does not exceed the thicknessof the conductive foil in a region of the conductive foil at leastexcept the region to be a conductive pattern that has a number of partsto carry circuit elements mounted thereon, thereby to form theconductive pattern in multiple blocks; a step of coating the isolationtrench and the conductive pattern with a thermosetting resin; a step ofexposing a predetermined surface of the conductive pattern through laseretching; a step of forming a conductive film selectively on the exposedconductive pattern; a step of fixing circuit elements on theelement-mounting parts of the desired conductive pattern; a step ofconnecting the electrode of the circuit element to the conductive filmof the conductive pattern by wire bonding; a step of common-molding itwith an insulating resin to collectively cover the circuit element onevery element-mounting part and to fill the isolation trench; a step ofremoving the conductive foil in the part of the isolation trench; a stepof sticking the multiple blocks to an adhesive sheet via the insulatingresin of each block; a step of measuring the characteristics of thecircuit element on each element-mounting part of each block attached tothe adhesive sheet; and a step of dicing the insulating resin into theindividual element-mounting parts of each block attached to the adhesivesheet.

The flowchart of FIG. 30 does not correspond to the method as above. Inthis, the two flows of Cu foil and half-etching are to form a conductivepattern. In the next flow of thermosetting resin, the surface of theisolation trench and the conductive pattern are covered with athermosetting resin. In the two flows of die bonding and wire bonding, acircuit element is fixed on each element-mounting part, and itselectrodes are connected to the conductive pattern. In the flow oftransfer molding, an insulating resin is applied to the structure bycommon molding. In the flow of removing the back Cu foil, the conductivefoil in the part of the isolation trench is etched away. In the flow ofback processing, the external electrodes that protrude from the back ofthe structure are subjected to surface treatment. In the flow ofadhesive sheet, multiple blocks are attached to an adhesive sheet. Inthe flow of measurement, the circuit elements built in the structure arechecked and graded. In the flow of dicing, the insulating resin is dicedinto individual circuit devices.

Next described are the steps of the invention with reference to FIG. 29and FIGS. 31 to 39.

As in FIG. 31 to FIG. 33, the first step comprises preparing conductivefoil 360, and forming a isolation trench 361 that does not exceed thethickness of the conductive foil 360 in a region of the conductive foilsheet 360 at least except the region to be a conductive pattern 351 thathas a number of parts to carry circuit elements 352 mounted thereon,thereby to form the conductive pattern 351 in multiple blocks.

In this step, a sheet like-conductive foil 360 is prepared, as in FIG.31A. The material for the conductive foil 360 is selected inconsideration of solder adhesiveness thereto and the bondability and theplatability thereof. For example, conductive foil of essentially Cu,conductive foil of essentially Al, or conductive foil of essentiallyFe—Ni alloy or the like may be used.

The thickness of the conductive foil is preferably from 10 μm to 300 μmor so in view of the easiness in etching it. In this, copper foil havinga thickness of 125 μm is used. Basically, however, the conductive foilmay be thicker than 300 μm or thinner than 10 μm. As will be mentionedhereinunder, the thickness of the conductive foil 360 may be such thatit accepts the formation of a shallow isolation trench 361 therein.

The conductive foil sheet 360 may be prepared in the form of a rollhaving a predetermined width, for example, 45 mm, and this may be fed toeach step. Alternatively, strips of conductive foil 360 cut to have apredetermined size may be prepared and these may be fed to each step.

Concretely, four or five blocks 362 are formed on a conductive foilstrip 360, spaced from each other as in FIG. 31B. Each block shall havea large number of element-mounting parts to be formed therein. A slit363 is formed between the neighboring blocks 362, and this acts toabsorb the stress of the conductive foil 360 in thermal treatment in themolding step, etc. Index holes 364 are formed at predetermined intervalsin the upper and lower peripheries of the conductive foil 360, and theseare for location in every step.

Next, a conductive pattern 351 is formed in every block.

As in FIG. 32, a photoresist (etching-resistant mask) PR is formed onthe Cu foil 360, and this is patterned to partly expose the conductivefoil 360 except the region to be a conductive pattern 351. Next, as inFIG. 33A, the conductive foil 360 is selectively etched via thephotoresist PR.

The depth of the isolation trench 361 formed by the etching is, forexample, from 20 to 30 μm, and the side wall thereof is roughenedthrough oxidation or chemical polishing so as to increase itsadhesiveness to the thermosetting resin layer 350A.

The side wall of the isolation trench 361 is schematically drawn to bestraight in the figures, but may have any other structure depending onthe method of removing the photoresist for forming it. The method ofphotoresist removal includes wet etching, dry etching, laser evaporationand dicing. In wet etching, the etchant to be employed is essentiallyferric chloride or cupric chloride, and the conductive foil is dipped inor showered with the etchant. In wet etching, in general, the conductivefoil is etched non-anisotropically, and its etched side wall istherefore curved.

In dry etching, the conductive foil may be etched anisotropically ornon-anisotropically. At present, it is said that Cu could not be removedthrough reactive ion etching, but it may be removed through sputtering.Depending on the condition of sputtering, Cu may be etchedanisotropically or non-anisotropically.

In laser evaporation, a laser ray may be directly applied to theconductive foil to form the isolation trench 361. In this case, the sidewall of the isolation trench 361 formed may be straight.

FIG. 33B is a schematic view of the conductive pattern 351. Thiscorresponds to an enlargement of one block 362 shown in FIG. 31B. Oneblack section corresponds to one element-mounting part 365, and theblack sections constitute the conductive pattern 351. One block 362 hasa large number of element-mounting parts 365 that are aligned in amatrix of 5 lines and 10 rows, and the same conductive pattern 351 isformed for every element-mounting part 365. A frame pattern 366 isformed around every block, and registration marks 367 for dicing areprovided inside it, spaced in some degree from it. The frame pattern 366is for engagement of the patterned conductive foil with a mold, andafter back etching of the conductive foil 360, it reinforces theinsulating resin 350B.

The second step of the invention is to form the thermosetting resinlayer 350A that covers the isolation trench 361 and the surface of theconductive pattern 351, as in FIG. 34.

This step characterizes the invention, in which a thermosetting resinsuch as epoxy resin is used for the thermosetting resin layer 350A, andthis fills the isolation trench 361 and covers the surfaces of theconductive patterns 351A, 351B and 351C. For forming the thermosettingresin layer 350A, a liquid material prepared by dissolving athermosetting resin in an organic solvent is cast over the isolationtrench 361 and the conductive patterns 351A, 351B and 351C, heated at80° C. to 100° C. to semi-cure it with evaporating away the organicsolvent, and then further heated at 150° C. to 170° C. for about 1.5hours to finally cure it. Accordingly, the semi-cured thermosettingresin is in B-stage, and it is not as yet finally set.

Preferably, a filler such as silica or alumina is added to thethermosetting resin layer 350A to reduce the thermal expansiondifference between the layer 350A and the conductive patterns 351A, 351Band 351C. In general, the thermal expansion coefficient of epoxy resinis 50 ppm/° C.; that of epoxy resin containing the filler is from 15 to30 ppm/° C.; and that of copper to form the conductive patterns 351A,351B and 351C is 18 ppm/° C. Therefore, the filler may remove thethermal expansion mismatch between epoxy resin and copper.

Since the thermosetting resin for the layer 350A is filled into theisolation trench 361 while it is a liquid of low viscosity, it may welladhere to the inner walls of the isolation trench 361, as compared withepoxy resin to be transfer-molded, and the adhesion strength between thetwo may be increased significantly. The depth of the isolation trench161 is about 60 μm for ensuring the necessary adhesion strength in therelated art. However, since the adhesion strength in this embodiment isincreased, the depth of the isolation trench 361 may be a half of it inthe related art as above, concretely from 20 to 30 μm, and this producesan advantage in that the conductive pattern 351 may be a finer pattern.

Another method may be employed for forming the thermosetting resin layer350A, which comprises pressing a semi-cured film sheet of thermosettingresin such as epoxy resin against the conductive patterns 351A, 351B and351C followed by finally curing it thereon under heat to thereby coverthe conductive patterns and fill the isolation trench 361 with theresin. The surface of the thermosetting resin film is covered with acushion sheet, and pressed under 100 kg/cm² under heat at 150° C. to170° C., and the resin is finally cured while its melt covers theisolation trench 361 and the surfaces of the conductive patterns 351A,351B and 351C.

In this step, it is desirable to roughen the inner wall of the isolationtrench 361 for further enhancing the adhesion strength between theisolation trench 361 and the thermosetting resin layer 350A. For it, forexample, the inner wall of the isolation trench 361 is oxidized orchemically polished with an organic acid etchant. For the organic acidetchant, for example, Mec's CZ-8100 may be used. The patternedconductive foil is dipped in the etchant for a few minutes to roughenthe surface thereof to a degree of from 1 to 2 μm or so. Through thetreatment, the inner wall of the isolation trench 361 is roughened, andthe adhesion strength between the isolation trench 361 and thethermosetting resin layer 350A is thereby increased.

In another embodiment of this step, a UV-curable resin may be used inplace of thermosetting resin. Concretely, a UV-curable resin is appliedonto the patterned conductive foil, using a vacuum laminator, and thencured through exposure to UV rays and development to thereby form acured UV resin layer that covers the desired surface of the isolationtrench 361 and the conductive pattern 351. This embodiment simplifiesthe process since it covers the next third step.

The third step of the invention comprises exposing the surface of apredetermined area of the conductive pattern 351 by removing thethermosetting resin layer 350A thereon through laser etching, as in FIG.35.

In this step, the thermosetting resin layer 350A is partly selectivelyremoved through laser etching for direct patterning to thereby partlyexpose the conductive pattern 351. For the laser, carbon dioxide laseris preferred, but excimer laser and YAG laser may also be used. When theresin still remains on the bottom of the opening after its removalthrough laser evaporation, it is removed, for example, through wetetching with sodium permanganate or ammonium persulfate or through dryetching with excimer laser.

The fourth step of the invention comprises forming a conductive film 354on the exposed conductive pattern 351, as in FIG. 36.

The remaining thermosetting resin layer 350A serves as a mask, and theexposed conductive pattern 351 is plated with any of gold, silver orpalladium by electrolytic plating or electroless plating to have theconductive film 354 formed thereon. The conductive film 354 serves as adie pad or a bonding pad.

For example, a silver film adheres to gold wires and to solder.Therefore, when the back of the chip to be applied to the structure ofthis embodiment is coated with gold, the chip may directly be bonded tothe silver film formed on the conductive pattern 351 or may be bondedthereto via solder. In addition, fine Au wires may adhere to theconductive film of silver. Therefore, the conductive film 354 acceptswire bonding, and its one advantage is that the film may serve directlyas a die pad or a bonding pad.

The fifth step of the invention comprises fixing a circuit element 352on the element-mounting part 365 of the desired conductive pattern 351,and forming a connecting means for electrically connecting the electrodeof the circuit element 352 in the element-mounting part 365 to a desiredpart of the conductive pattern 351, as in FIG. 37.

The circuit element 352 includes semiconductor elements such astransistors, diodes, IC chips, and passive elements such as chipcapacitors and chip resistors. Though thick, face-down semiconductorelements such as CSP or BGA may also be mounted on the structure.

In the illustrated embodiment, a bare transistor chip 352A is die-bondedto the conductive film 354 on the conductive pattern 351A, and itsemitter electrode is bonded to the conductive film 354 on the conductivepattern 351B with its base electrode to the conductive film 354 on theconductive pattern 351B, via a bonding wire 355A bonded to the two bythermal ball bonding or ultrasonic wedge bonding. 352B is a chipcapacitor or a passive element, and it is bonded to the structure viasolder or conductive paste 355B.

A large number of conductive patterns 351 are integrated in every block362. Therefore, the advantage of this step is that the circuit elements352 may be efficiently mounted on the conductive patterns throughphysical fixation and wire bonding.

The sixth step of the invention comprises common-molding the circuitelements 352 on the element-mounting parts 363 with an insulating resin350B that collectively covers the elements and bonds to thethermosetting resin layer 350A filled in the isolation trench 361, as inFIG. 38.

The isolation trench 361 and the multiple conductive patterns 351A, 351Band 351C are covered with the thermosetting resin layer 350A in theprevious step, and the insulating resin 350B covers the circuit element352 and bonds to the thermosetting resin layer 350A remaining in theisolation trench 361 and on the surface of the conductive pattern 351,as in FIG. 38A. In particular, when thermosetting resin of the same typesuch as epoxy resin is used for both the thermosetting resin layer 350Aand the insulating resin 350B, the two have an affinity for each otherand therefore produce a higher adhesion strength between them. Forfurther enhancing the adhesion strength, it is desirable that thesurface of the thermosetting resin layer 350A is subject to UVirradiation or plasma irradiation to activate the polar group of theresin in the surface of the layer 350A prior to the molding treatmentwith the insulating resin 350B. As a result, the thermosetting resinlayer 350A is integrated with the insulating resin 350B to more firmlysupport the conductive pattern 351.

The treatment of this step may be realized by transfer molding,injection molding or dipping. Regarding the type of the resin material,thermosetting resin such as epoxy resin may be transfer-molded; andthermoplastic resin such as polyimide resin or polyphenylene sulfide maybe injection-molded.

In this step of transfer molding or injection molding, theelement-mounting parts 363 in one block 362 are all put in one commonmold, and they are common-molded with one insulating resin 350, as inFIG. 38B. In this step, therefore, the amount of the resin to be usedmaybe reduced significantly, as compared with that in conventionaltransfer molding, and common molds may be used.

The thickness of the insulating resin 350B that covers the surface ofthe conductive foil 360 is so controlled that it is about 100 μm or sofrom the top of the circuit element 352. This thickness may be increasedor decreased in consideration of the mechanical strength of the resinlayer.

This step is characterized in that the conductive foil 360 to form theconductive pattern 351 serves as a supporting board before it is coatedwith the insulating resin 130B. In the related art technology, theconductive paths 507 to 511 are formed by the use of the supportingboard 505 that is naturally unnecessary, as in FIG. 11. In theinvention, however, the conductive foil 360 that serves as thesupporting board is a material necessary for electrodes. Accordingly,the invention is advantageous in that the necessary constitutivematerials may be reduced to the minimum and the production costs aretherefore reduced.

Since the depth of the isolation trench 361 does not exceed thethickness of the conductive foil 360, the conductive pattern 351 of theconductive foil 360 is not individually separated. Accordingly, theconductive foil 360 can be handled as one sheet as a whole, and when itis molded with the insulating resin 350B, it may be readily transferredand put into a mold.

The seventh step of the invention comprises removing the conductive foil360 in the part of the isolation trench 361, as in FIG. 39.

In this step, a resist layer 359 is formed on the back of the conductivefoil 360 except a part thereof that corresponds to the isolation trench361. Via the resist layer 359 that serves as a mask, the conducive foil360 is chemically etched with an etchant of ferric chloride or the like.As a result, the conductive foil 360 corresponding to the part of theisolation trench 361 is selectively removed, and the bottom of thethermosetting resin layer 350A in that part is exposed out. In thisstep, the joint part of the conductive foil 360 not having the isolationtrench 361 is removed, and the conductive pattern 351 of which thethickness corresponds to that of the conductive foil 360 is separatedfrom each other.

In the structure thus processed, the back of the conductive pattern 351that is almost completely embedded in the thermosetting resin layer 350Ais exposed out. As a result, protruding external electrodes 356A, 356Band 356C that protrudes from the back of the thermosetting resin layer350A by about 100 μm are formed. This means that the external electrodes356A, 356B and 356C are formed as protruding electrodes in the jointpart of the conductive foil 360 not having the isolation trench 361.

Further, the back of the external electrodes 356A, 356B and 356C isprocessed to obtain the final structure as in FIG. 39. Concretely, theexternal electrodes 356A, 356B and 356C are covered with a conductivematerial such as solder to complete the circuit device of the invention.In this case, the conductive material such as solder runs along the sidewalls of the external electrodes 356A, 356B and 356C, whereby theconductive paths of the printed circuit board bond to the externalelectrodes 356A, 356B and 356C via their surfaces and side walls and thebonding strength between them is thereby enhanced.

Further, when the external electrodes 356A, 356B and 356C are coatedwith a thin gold plate layer, they realize a land grid array (LGA)structure.

Through the back treatment, only the external electrodes 356A, 356B and356C are exposed out of the thermosetting resin layer 350A and theinsulating resin 350B, and this embodiment is advantageous in that itdoes not require a mask and is therefore simple.

The eighth to tenth steps of this mode are the same as those of thefourth mode described hereinabove.

In the invention, the conductive foil to be a conductive patternfunctions by itself as a supporting board, and the conductive foilsupports the entire structure while the isolation trench is formed andwhile the circuit elements are mounted and covered with an insulatingresin. When the conductive foil is separated into the individualconductive pattern, the insulating resin functions as the supportingboard. Accordingly, the minimum constitutive components—circuit element,conductive foil and insulating resin may be enough for the invention.This means that the invention does not require the supporting board thatis indispensable in the related art technology of manufacturing circuitdevices, and it reduces the production costs. In the invention, inaddition, the supporting board is unnecessary, the conductive pattern isembedded in the insulating resin, and the thickness of the insulatingresin and the conductive foil may be varied in any desired manner. Thuscharacterized by these advantages, still another advantage of theinvention is that it produces extremely thin-walled circuit devices.

Further, since the isolation trench and the conductive pattern arecovered with a thermosetting resin, still another advantage of theinvention is that the thermosetting resin of low viscosity may have anincreased adhesion strength to the isolation trench. In addition, thethermosetting resin and the insulating resin have an affinity to eachother as they are the resins of the same type, and they may firmly bondto each other to realize good resin encapsulation for integratedsemiconductor package structures. Accordingly, even though the structureof the invention comprises a one-face molded conductive pattern, itcompletely overcomes the drawback of peeling of the thermosetting resinlayer from the insulating resin at the isolation trench. In addition,since the adhesion strength between the two resins in the structure ofthe invention is increased, the depth of the isolation trench may befrom 20 to 30 μm or so, or that is, a half of ordinary isolationtrenches. This produces still another advantage in that the conductivepattern may be a finer pattern.

Further, since the conductive pattern is covered with a thermosettingresin layer and a conductive film, its surface is protected fromoxidation. In particular, when copper foil is used, its surface is moresurely protected from oxidation.

Further, since the external electrodes are formed of the joint part ofthe conductive foil not having the isolation trench, they may beprotruding electrodes with ease. When they serve as a heat sink, theheat radiation of the circuit device may be improved.

In the manufacturing method of the invention, since the conductivepattern is coated with a semi-cured thermosetting resin layerimmediately after its formation, the isolation trench can be completelyfilled with a liquid thermosetting resin of low viscosity, and theadhesion strength of the two is significantly increased. In addition,since the thermosetting resin layer covers the conductive patternimmediately after the conductive pattern has been formed, the surface ofthe conductive pattern is not oxidized in the subsequent heating stepfor die bonding or wire bonding, and the reliability of the devicesfabricated is high.

Further, the thermosetting resin layer may be readily selectivelyremoved through laser etching, and the remaining thermosetting resinlayer may serve as a mask in plating the exposed conductive pattern witha conductive film. Accordingly, the manufacturing process is simplified.

When an insulating resin is filled into isolation trenches by ordinarytransfer molding, it could not be fully filled thereinto since itsviscosity is high. Therefore, the problem with the case is that theadhesion strength between the isolation trench and the insulating resinis not good and the insulating resin readily peels from the conductivepattern. The invention has solved the problem by using a semi-curedthermosetting resin of low viscosity, and the adhesion strength betweenthe isolation trench and the thermosetting resin layer in the inventionis increased. Specifically, since the thermosetting resin and theinsulating resin have an affinity to each other as they are the resinsof the same type, and the adhesion strength of the conductive pattern tothe thermosetting resin layer and to the insulating resin is greatlyincreased.

Further, since the external electrodes are formed by selectively etchingthe joint part of the conductive foil in the isolation trench area, theydo not require plating treatment and may be readily protrudingelectrodes.

Seventh Embodiment

The seventh mode of the circuit device of the invention is describedwith reference to FIG. 40.

The circuit device of the invention comprises a first multipleconductive patterns for element mounting thereon that are electricallyseparated from each other by a isolation trench, a thermosetting resinlayer that fills the isolation trench to cover the surface of the firstconductive pattern, a second conductive pattern formed on thethermosetting resin layer and connected to desired region of the firstconductive pattern, a circuit element fixed on the second conductivepattern while insulated from it, and an insulating resin that covers thecircuit element to integrally support the first and second conductivepatterns bonded to the thermosetting resin layer.

FIG. 40 shows a circuit device 453 having a first conductive pattern 351almost embedded in a thermosetting resin layer 450A, in which a secondconductive pattern 471 is formed on the thermosetting resin layer 450A,a circuit element 452 is fixed onto the second conductive pattern 451while electrically insulated from it, and the first conductive pattern451 is supported by an insulating resin 450B bonded to the thermosettingresin layer 450A.

This structure comprises four types of elements, the circuit element452, the first multiple conductive pattern 451 and the second conductivepattern 471, the thermosetting resin layer 450A to envelop the firstconductive pattern 451, and the insulating resin 450B that bonds to theresin layer 450A. In this, the first conductive pattern 451 is separatedby the isolation trench 461 filled with the thermosetting resin layer450A. The first conductive pattern 451 and the second conductive pattern471 are supported by the thermosetting resin layer 450A and theinsulating resin 450B.

For the thermosetting resin layer 450A that characterizes the invention,a thermosetting resin such as epoxy resin is used. The resin fills theisolation trench 461 and covers the surface of the first conductivepattern 451. To form the thermosetting resin layer 450A, a liquidmaterial prepared by dissolving a thermosetting resin in an organicsolvent is cast over the isolation trench 461 and the first conductivepattern 451, semi-cured to evaporate away the organic solvent, and thenfinally cured. Preferably, a filler such as silica or alumina is addedto the thermosetting resin layer 450A to reduce the thermal expansiondifference between the layer 450A and the first conductive pattern 451.In general, the thermal expansion coefficient of epoxy resin is 50 ppm/°C.; that of epoxy resin containing the filler is from 15 to 30 ppm/° C.;and that of copper to form the first conductive pattern 451 is 18 ppm/°C. Therefore, the filler may remove the thermal expansion mismatchbetween epoxy resin and copper.

Since the thermosetting resin for the layer 450A is filled into theisolation trench 461 while it is a liquid of low viscosity, it may welladhere to the inner walls of the isolation trench 461, as compared withepoxy resin to be transfer-molded, and the adhesion strength between thetwo may be increased significantly.

Another method may be employed for forming the thermosetting resin layer450A, which comprises pressing a semi-cured film sheet of thermosettingresin such as epoxy resin against the first conductive pattern 451followed by finally curing it thereon under heat to thereby cover theconductive pattern and fill the isolation trench 461 with the resin.

For the insulating resin 450B, any of thermosetting resin such as epoxyresin, or thermoplastic resin such as polyphenylene sulfide may beemployed. Not limited to these, the insulating resin maybe any and everyresin that may be solidified in molds, or may be applied tosemiconductor by dipping or coating. However, in consideration of itsbonding strength to the thermosetting resin layer 450A, resin of thesame type is preferred for the two. Therefore, in this, thermosettingresin such as epoxy resin is used for the insulating resin 450B.

For the first conductive pattern 451, for example, any of conductivefoil consisting essentially of Cu maybe employed, conductive foilconsisting essentially of Al, or conductive foil consisting essentiallyof Fe—Ni alloy or the like may be used. Needless to say, any otherconductive material may also be used. Especially preferred are etchableconductive materials and conductive materials evaporable by laser.

For the second conductive pattern 471, a conductive film of Cu may beused which is formed on the surface of the thermosetting resin layer450A through electrolytic or electroless plating with Cu thereon. Thethermosetting resin layer 450A is selectively removed from the spots ofthe first conductive pattern 451 for electric bonding thereof to thesecond conductive pattern.

For connecting the circuit element 452 to any other element, a bondingwire 455 is used in a face-up structure, or a conductive ball of solder,a flattenable conductive ball or other solder material in a face-downstructure. The connecting means is selected depending on the type of thecircuit element 452 and the mounting mode thereof.

The second conductive pattern 471 to which the bonding wire 455 orsolder is bonded is selectively exposed out of the insulating film 472,and a conductive film 454 is formed on the surface of the thus-exposedsecond conductive pattern 471. The material for the conductive film 454is, for example, any of Ag, Au, Pt or Pd. The conductive film may beformed through low-vacuum or high-vacuum coating, plating or sinteringthat includes vapor deposition, sputtering, CVD and the like.

The back electrode 456 is formed by selectively exposing out apredetermined region of the first conductive pattern 451 with maskingthe other region thereof with a resist layer 457, followed by applying aconductive material such as solder to the exposed region, and the backelectrodes are protruding electrodes.

In this circuit device, the first conductive pattern 451 and the secondconductive pattern 471 are supported by the thermosetting resin layer450A and the insulating resin 450B, and therefore do not require asupporting board for them. This constitution characterizes theinvention. As so described hereinabove with reference to the relatedart, the conductive paths in conventional circuit devices are supportedby a supporting board or by a lead frame, and they require superfluousstructures that are naturally unnecessary. However, the circuit deviceof the invention is composed of the least necessary constitutiveelements, not requiring a supporting board, and it may be thinned andlow-priced.

Another advantage of the circuit device of the invention is that thethermosetting resin layer 450A therein covers the circuit element 452and fills the isolation trench 461 between the first conductivepatterning 451 for individual insulation.

In the circuit device, the thermosetting resin layer 450A and theinsulating resin 450B integrally support the structure in such a mannerthat the insulating resin 450B covers the circuit element 452 and thethermosetting resin layer 450A fills the isolation trench 461 betweenthe first conductive pattern 451 with the back alone of the firstconductive pattern 451 exposed outside.

The circuit element 452 is bonded onto the insulating film 472 thatcovers the second conductive pattern 471, via an insulating adhesive458, and the circuit element 452 is electrically insulated from thesecond conductive pattern 471. Accordingly, the first conductive pattern451 and the second conductive pattern 471 may be wired in any desiredmanner below the circuit element 452, and this realizes multi-layerwiring. Each electrode pad of the circuit element 452 is connected tothe conductive film 454 formed of a part of the second conductivepattern 471 around the circuit element and serving as a bonding pad, viaa bonding wire 455.

Exposing the back of the first conductive pattern 451 characterizes theinvention. The back of the conductive path may be connected to externalelements, therefore not requiring through-holes TH as in theconventional structure in FIG. 11.

In this circuit device, the surface of the isolation trench 461 issubstantially on the same level as the back of the first conductivepattern 451. This structure characterizes the invention. This does nothave a difference in level for the back electrodes 510 and 511 as inFIG. 11. Therefore, the circuit device 453 is characterized in that itaccepts horizontal movement.

In another embodiment, a UV-curable resin may be used in place of thethermosetting resin layer 450A. Concretely, a UV-curable resin isapplied onto the structure, using a vacuum laminator, and then curedthrough exposure to UV rays and development to thereby form a cured UVresin film that covers the desired surface of the isolation trench 461and the first conductive pattern 451. UV-curable resin is a type ofepoxy resin, and is therefore effective like the thermosetting resinlayer 450A.

One embodiment of manufacturing the circuit device of the invention isdescribed with reference to FIG. 41.

The method of the invention comprises a step of preparing conductivefoil and forming a isolation trench that does not exceed the thicknessof the conductive foil in a region of the conductive foil at leastexcept the region to be a first conductive pattern that has a number ofparts to carry circuit elements mounted thereon, thereby to form thefirst conductive pattern in multiple blocks; a step of coating theisolation trench and the first conductive pattern with a thermosettingresin; a step of exposing a predetermined surface of the firstconductive pattern through laser etching; a step of forming a conductivefilm of Cu plate on the surface of the thermosetting resin layer incontact with the exposed first conductive pattern, followed by etchingit in a predetermined pattern to form a second conductive pattern; astep of forming a conductive film selectively on the exposed secondconductive pattern; a step of fixing circuit elements onto theinsulating film that covers the second conductive pattern; a step offorming a connecting means for electrically connecting the electrode ofeach circuit element to a desired part of the second conductive pattern;a step of common-molding it with an insulating resin to collectivelycover the circuit element on every element-mounting part; a step ofremoving the conductive foil in the thickness part with no isolationtrench formed therein; a step of sticking the multiple blocks to anadhesive sheet via the insulating resin of each block; a step ofmeasuring the characteristics of the circuit element on eachelement-mounting part of each block attached to the adhesive sheet; anda step of dicing the insulating resin into the individualelement-mounting parts of each block attached to the adhesive sheet.

The flowchart of FIG. 41 does not correspond to the method as above. Inthis, the two flows of Cu foil and half-etching are to form a conductivepattern. In the next flow of thermosetting resin, the surface of theisolation trench and the first conductive pattern is covered with athermosetting resin. In the flows of laser etching, Cu plating andetching, the second conductive pattern is formed. In the flow of Auplating, a bonding pad is selectively formed in the second conductivepattern. In the two flows of die bonding and wire bonding, a circuitelement is fixed onto each element-mounting part, and its electrodes areconnected to the second conductive pattern. In the flow of transfermolding, an insulating resin is applied to the structure by commonmolding. In the flow of removing the back Cu foil, the conductive foilin the thickness part with no isolation trench therein is etched away.In the flow of back processing, the electrodes of the first conductivepattern exposed to the back are processed. In the flow of adhesivesheet, multiple blocks are attached to an adhesive sheet. In the flow ofmeasurement, the circuit elements built in the structure are checked andgraded. In the flow of dicing, the insulating resin is diced intoindividual circuit devices.

Next described are the steps of the invention with reference to FIG. 40and FIGS. 42 to 50.

As in FIG. 42 to FIG. 44, the first step comprises preparing conductivefoil 460, and forming a isolation trench 461 that does not exceed thethickness of the conductive foil 460 in a region of the conductive foil460 at least except the region to be a first conductive pattern 451 thathas a number of parts to carry circuit elements 452 mounted thereon,thereby to form the first conductive pattern 451 in multiple blocks.

In this step, a sheet of conductive foil 460 is prepared, as in FIG.42A. The material for the conductive foil 460 is selected inconsideration of solder adhesiveness thereto and the bondability and theplatability thereof. For example, usable is conductive foil ofessentially Cu, conductive foil of essentially Al, or conductive foil ofessentially Fe—Ni or the like alloy.

The thickness of the conductive foil is preferably from 10 μm to 300 μmor so in view of the easiness in etching it. In this, used is copperfoil having a thickness of 125 μm. Basically, however, the conductivefoil may be thicker than 300 μm or thinner than 10 μm. As will bementioned hereinunder, the thickness of the conductive foil 460 may besuch that it accepts the formation of a shallow isolation trench 461therein.

The conductive foil sheet 460 may be prepared in the form of a rollhaving a predetermined width, for example, 45 mm, and this may be fed toeach step. Alternatively, strips of conductive foil 460 cut to have apredetermined size may be prepared and these may be fed to each step.

Concretely, four or five blocks 462 are formed on a conductive foilstrip 460, spaced from each other as in FIG. 42B. Each block shall havea large number of element-mounting parts to be formed therein. A slit463 is formed between the neighboring blocks 462, and this acts toabsorb the stress of the conductive foil 460 in thermal treatment in themolding step, etc. Index holes 464 are formed at predetermined intervalsin the upper and lower peripheries of the conductive foil 460, and theseare for location in every step.

Next, a first conductive pattern 451 is formed in every block.

As in FIG. 43, a photoresist (etching-resistant mask) PR is formed onthe Cu foil 460, and this is patterned to partly expose the conductivefoil 460 except the region to be a first conductive pattern 451. Next,as in FIG. 44A, the conductive foil 460 is selectively etched via thephotoresist PR.

The depth of the isolation trench 461 formed by the etching is, forexample, from 20 to 30 μm, and the side wall thereof is roughenedthrough oxidation or chemical polishing so as to increase itsadhesiveness to the thermosetting resin layer 450A.

The side wall of the isolation trench 461 is schematically drawn to bestraight in the figures, but may have any other structure depending onthe method of removing the photoresist for forming it. The method ofphotoresist removal includes wet etching, dry etching, laser evaporationand dicing. In wet etching, the etchant to be employed is essentiallyferric chloride or cupric chloride, and the conductive foil is dipped inor showered with the etchant. In wet etching, in general, the conductivefoil is etched non-anisotropically, and its etched side wall istherefore curved.

In dry etching, the conductive foil may be etched anisotropically ornon-anisotropically. At present, it is said that Cu could not be removedthrough reactive ion etching, but it may be removed through sputtering.Depending on the condition of sputtering, Cu may be etchedanisotropically or non-anisotropically.

In laser evaporation, a laser ray may be directly applied to theconductive foil to form the isolation trench 461. In this case, the sidewall of the isolation trench 461 formed may be straight.

FIG. 44B is a schematic view of the first conductive pattern 451. Thiscorresponds to an enlargement of one block 462 shown in FIG. 42B. Oneblack section corresponds to one element-mounting part 465, and theblack sections constitute the first conductive pattern 451. One block462 has a large number of element-mounting parts 465 that are aligned ina matrix of 5 lines and 10 rows, and the same first conductive pattern451 is formed for every element-mounting part 465. A frame pattern 466is formed around every block, and registration marks 467 for dicing areprovided inside it, spaced in some degree from it. The frame pattern 466is for engagement of the patterned conductive foil with a mold, andafter back etching of the conductive foil 460, it reinforces theinsulating resin 450B.

The second step of the invention is to form the thermosetting resinlayer 450A that covers the isolation trench 461 and the surface of thefirst conductive pattern 451, as in FIG. 45.

This step characterizes the invention, in which a thermosetting resinsuch as epoxy resin is used for the thermosetting resin layer 450A, andthis fills the isolation trench 461 and covers the surface of the firstconductive pattern 451. For forming the thermosetting resin layer 450A,a liquid material prepared by dissolving a thermosetting resin in anorganic solvent is cast over the isolation trench 461 and the firstconductive pattern 451, heated at 80° C. to 100° C. to semi-cure it withevaporating away the organic solvent, and then further heated at 150° C.to 170° C. for about 1.5 hours to finally cure it. Accordingly, thesemi-cured thermosetting resin is in B-stage, and it is not as yetfinally set.

Preferably, a filler such as silica or alumina is added to thethermosetting resin layer 450A to reduce the thermal expansiondifference between the layer 450A and the first conductive pattern 451.In general, the thermal expansion coefficient of epoxy resin is 50 ppm/°C.; that of epoxy resin containing the filler is from 15 to 30 ppm/° C.;and that of copper to form the conductive pattern 451 is 18 ppm/° C.Therefore, the filler may remove the thermal expansion mismatch betweenepoxy resin and copper.

Since the thermosetting resin for the layer 450A is filled into theisolation trench 461 while it is a liquid of low viscosity, it may welladhere to the inner walls of the isolation trench 461, as compared withepoxy resin to be transfer-molded, and the adhesion strength between thetwo may be increased significantly. The depth of the isolation trench461 is about 60 μm for ensuring the necessary adhesion strength in therelated art. However, since the adhesion strength in this embodiment isincreased, the depth of the isolation trench 461 may be a half of it inthe related art as above, concretely from 20 to 30 μm, and this producesan advantage in that the first conductive pattern 451 may be a finerpattern.

Another method may be employed for forming the thermosetting resin layer450A, which comprises pressing a semi-cured film sheet of thermosettingresin such as epoxy resin against the first conductive pattern 451followed by finally curing it thereon under heat to thereby cover thefirst conductive pattern 451 and fill the isolation trench 461 with theresin. The surface of the thermosetting resin film is covered with acushion sheet, and pressed under 100 kg/cm² under heat at 150° C. to170° C., and the resin is finally cured while its melt covers theisolation trench 461 and the surface of the first conductive pattern451.

In this step, it is desirable to roughen the inner wall of the isolationtrench 461 for further enhancing the adhesion strength between theisolation trench 461 and the thermosetting resin layer 450A. For it, forexample, the inner wall of the isolation trench 461 is oxidized orchemically polished with an organic acid etchant. For the organic acidetchant, for example, usable is Mec's CZ-8100. The patterned conductivefoil is dipped in the etchant for a few minutes to roughen the surfacethereof to a degree of from 1 to 2 μm or so. Through the treatment, theinner wall of the isolation trench 461 is roughened, and the adhesionstrength between the isolation trench 461 and the thermosetting resinlayer 450A is thereby increased.

In another embodiment of this step, a UV-curable resin may be used inplace of the thermosetting resin for the layer 450A. Concretely, aUV-curable resin is applied onto the patterned conductive foil, using avacuum laminator, and then cured through exposure to UV rays anddevelopment to thereby form a cured UV resin layer that covers thedesired surface of the isolation trench 461 and the first conductivepattern 451. This embodiment simplifies the process since it covers thenext third step.

The third step of the invention comprises exposing the surface of apredetermined area of the first conductive pattern 451 by removing thethermosetting resin layer 450A thereon through laser etching, followedby applying a conductive plate film 474 thereto for forming a secondconductive pattern 471 thereon, as in FIG. 46.

In this step, the thermosetting resin layer 450A is partly selectivelyremoved through laser etching for direct patterning to thereby partlyexpose the first conductive pattern 451 with forming through-holes 473therein. For the laser, carbon dioxide laser is preferred, but excimerlaser and YAG laser may also be used. When the resin still remains onthe bottom of the opening after its removal through laser evaporation,it is removed, for example, through wet etching with sodium permanganateor ammonium persulfate or through dry etching with excimer laser.

Next, a conductive plate film 474 is formed to cover the through-holes474 and the surface of the thermosetting resin layer 450A, as in FIG.46.

Concretely, a conductive plate film 474 is formed over the entiresurface of the structure including the through-holes 473 and thethermosetting resin layer 450A, with no mask. The conductive plate film474 may be formed in any mode of electroless plating or electrolyticplating. In this case, it is formed through electroless plating with Cuto have a thickness of about 2 μm, and it covers the entire surface ofthe structure including the through-holes 473 and the thermosettingresin layer 450A. Accordingly, the conductive plate film 474 iselectrically connected to the first conductive pattern 451. Using thefirst conductive pattern 451 formed of the conductive foil 460 as anelectrode, this is further electrolytically plated with Cu to formthereon a Cu plate having a thickness of about 20 μm. As a result, thethrough-holes 473 are all filled with the conductive plate film 474. Cuis used for the conductive plate film 474, for which, however, any otherof Au, Ag or Pd may also be used. As the case may be, the structure maybe partly plated via a mask.

The fourth step of the invention comprises etching the conductive platefilm 474 in a predetermined pattern to form the second conductivepattern 471, as in FIG. 47.

The conductive plate film 474 is coated with a photoresist layer of apredetermined pattern, and this is chemically etched to form theconductive film 454 that is to be a bonding pad and the secondconductive pattern 471 that extends toward the center from the bondingpad. The conductive plate film 474 is formed of a material ofessentially Cu, and the etchant for it may be ferric chloride or cupricchloride.

The thickness of the conductive plate film 474 is approximately from 5to 20 μm. Therefore, its advantage is that the second conductive pattern471 may be a fine pattern of at most 20 μm.

The fifth step of the invention comprises forming a conductive film 454on the exposed second conductive pattern 471, as in FIG. 48.

The second conductive pattern 471 is coated with an insulating film 475such as overcoating resin. For forming the insulating film 475, forexample, epoxy resin or the like dissolved in a solvent may be appliedto the structure by screen-printing and then thermally cured.Alternatively, a photo-solder resist may be used for the insulating film475, and it may be partly left through exposure and development.

Next, the second conductive pattern 471 is masked with a photoresistlayer except the part thereof to be a bonding pad, and the insulatingfilm 474 is selectively removed through laser etching whereby the secondconductive pattern 471 is selectively exposed out. For the laser, carbondioxide laser is preferred, but excimer layer and YAG laser may also beused. When the insulating resin still remains on the bottom of theopening after its removal through laser evaporation, it is removed, forexample, through wet etching with sodium permanganate or ammoniumpersulfate or through dry etching with excimer laser.

The remaining insulating film 475 serves as a mask, and the conductivefilm 454 is plated with any of gold, silver or palladium by electrolyticplating or electroless plating. Thus plated, it may serve as a bondingpad.

For example, a silver film adheres to gold wires and to solder. Inaddition, fine Au wires may adhere to such a conductive film of silver.Therefore, the conductive film 554 accepts wire bonding, and its oneadvantage is that the film may serve directly as a bonding pad.

The sixth step of the invention comprises fixing a circuit element 452onto the insulating film 457 in the element-mounting part 465 thereofwith a conductive or insulating adhesive 458, and forming a connectingmeans for electrically connecting the electrode of the circuit element452 in the element-mounting part 465 to a desired part of the secondconductive pattern 471, as in FIG. 49B.

The circuit element 452 includes semiconductor elements such astransistors, diodes, IC chips. Though thick, face-down semiconductorelements such as CSP or BGA may also be mounted on the structure.Multiple IC chips may be piled up or may be arrayed in plane toconstitute the circuit element 452.

In the illustrated embodiment, a bare IC chip 452 is fixed ontoinsulating film 457 with an insulating adhesive 458 such as epoxy resin,and the electrodes of the IC chip 452 are connected to the correspondingconductive films 454 formed on the second conductive pattern 471 aroundthe element-mounting part 465, via a bonding wire 455 bonded to the twoby thermal ball bonding or ultrasonic wedge bonding.

A large number of second conductive patterns 471 are integrated in everyblock 462. Therefore, the advantage of this step is that the circuitelements 452 may be efficiently mounted on the second conductivepatterns through physical fixation and wire bonding.

The seventh step of the invention comprises common-molding the circuitelements 452 on the element-mounting parts 463 with an insulating resin450B that collectively covers the elements and bonds to thethermosetting resin layer 450A filled in the isolation trench 461, as inFIG. 50.

The isolation trench 461 and the multiple conductive patterns 451 arecovered with the thermosetting resin layer 450A in the previous step,and the insulating resin 450B covers the circuit element 452 and bondsto the thermosetting resin layer 450A remaining in the isolation trench461 and on the surface of the first conductive pattern 451, as in FIG.50A. The insulating resin 475 exists between the thermosetting resinlayer 450A and the insulating resin 450B, but this is extremely thin andis formed of epoxy resin, a type of thermosetting resin. Therefore, theyare well compatible with each other and produce a strong adhesionstrength. For further enhancing the adhesion strength, it is desirablethat the surface of the insulating film 475 is subject to UV irradiationor plasma irradiation to activate the polar group of the resin in thesurface of the insulating film 475 prior to the molding treatment withthe insulating resin 450B. As a result, the thermosetting resin layer450A is integrated with the insulating resin 450B to more firmly supportthe first conductive pattern 451.

In this step, when direct bonding between the thermosetting resin layer450A and the insulating resin 450B is desired, it is preferable that thepart of the insulating film 475 not having the second conductive pattern471 therein is removed in the treatment of etching the insulating film475 in the previous step.

The treatment of this step may be realized by transfer molding,injection molding or dipping. Regarding the type of the resin material,thermosetting resin such as epoxy resin may be transfer-molded; andthermoplastic resin such as polyimide resin or polyphenylene sulfide maybe injection-molded.

In this step of transfer molding or injection molding, theelement-mounting parts 463 in one block 462 are all put in one commonmold, and they are common-molded with one insulating resin 450B, as inFIG. 50B. In this step, therefore, the amount of the resin to be usedmay be reduced significantly, as compared with that in conventionaltransfer molding, and common molds may be used.

The thickness of the insulating resin 450B that covers the surface ofthe conductive foil 460 is so controlled that it is about 100 μm or sofrom the top of the circuit element 452. This thickness may be increasedor decreased in consideration of the mechanical strength of the resinlayer.

This step is characterized in that the conductive foil 460 to form thefirst conductive pattern 451 serves as a supporting board before it iscoated with the insulating resin 450B. In the related art technology,the conductive paths 507 to 511 are formed by the use of the supportingboard 505 that is naturally unnecessary, as in FIG. 10. In theinvention, however, the conductive foil 460 that serves as thesupporting board is a material necessary for electrodes. Accordingly,the invention is advantageous in that the necessary constitutivematerials may be reduced to the minimum and the production costs aretherefore reduced.

Since the depth of the isolation trench 461 does not exceed thethickness of the conductive foil 460, the first conductive pattern 451of the conductive foil 460 is not individually separated. Accordingly,the conductive foil 460 can be handled as one sheet as a whole, and whenit is molded with the insulating resin 450B, it may be readilytransferred and put into a mold.

The seventh step of the invention comprises removing the conductive foil460 in the thickness part not having the isolation trench 461 formedtherein, as in FIG. 50A.

In this step, the back of the conductive foil 460 is chemically and/orphysically removed to individually separate the conductive pattern 451.This may be carried out, for example, through polishing, cutting,etching or metal evaporation with laser.

In one example of this process, the entire back of the conductive foil460 is cut with a polishing machine or a cutting machine to a depth ofabout 100 μm or so, whereby the thermosetting resin layer 450A isexposed out of the isolation trench 461. The face to be exposed outthrough the treatment is represented by the dotted line in FIG. 50A. Asa result, the first conductive pattern 451 is individually separated tohave a thickness of about 30 μm. Apart from it, the entire back of theconductive foil 460 maybe wet-etched before the thermosetting resinlayer 450A is exposed out, and then it may be cut with a polishing orcutting machine so that the thermosetting resin layer 450A is exposedout. In still another embodiment, the entire back of the conductive foil460 may be wet-etched to the depth of the dotted line whereby thethermosetting resin layer 450A may also be exposed out.

In the structure thus processed, the back of the first conductivepattern 451 is exposed out of the thermosetting resin layer 450A.Specifically, the face of the thermosetting resin layer 450A filled inthe isolation trench 461 is substantially on the same level as that ofthe first conductive pattern 451. Accordingly, the circuit device 453 ofthe invention does not have a difference in level for the backelectrodes 510 and 511 as in FIG. 12 that indicates a related arttechnology, and this is characterized in that, when other elements aremounted thereon, it accepts horizontal movement for self-alignment basedon the surface tension of solder or the like.

Further, the back of the first conductive pattern 451 is processed toobtain the final structure as in FIG. 40. Concretely, a part of thefirst conductive pattern 451 to form electrodes is selectively exposedout while the other part thereof is coated with a resist layer 457, anda conductive material such as solder is applied to it to form backelectrodes 456, thereby completing a final circuit device.

The eighth to tenth steps of this mode are the same as those of thefourth mode described hereinabove.

FIG. 51 is referred to, which shows an embodied circuit device of theinvention. In this, the pattern indicated by solid lines is the secondconductive pattern 471, and the pattern indicated by dotted lines arethe first conductive pattern 451. The second conductive pattern 471 isworked to form the conductive film 454 that serves as a bonding padaround the bare semiconductor chip 452. This partly has a two-layeredstructure, corresponding to the bare semiconductor chip 452 withmultiple pads therearound. The bonding pad is connected to thecorresponding electrode pad 475 of the bare semiconductor chip 452 viathe bonding wire 455. Many fine patterns, second conductive patterns 471extend from the bonding pad to the area below the bare semiconductorchip 452, and these are connected to the first conductive pattern 451through the through-holes 473 shown by black spots.

Having the constitution, even a semiconductor circuit device having 200or more pads may be connected to the desired first conductive patternvia the fine patterns, second conductive patterns 471, by multi-layeredwiring connection, and the back electrode 456 fitted to the firstconductive pattern may be connected to other external circuits. In FIG.51, the thermosetting resin layer 450A and the insulating resin 450B areomitted for simplifying the description.

1. A circuit device comprising: plurality of conductive patterns forelement mounting thereon and electrically separated from each other by aisolation trench; a thermosetting resin layer filling the isolationtrench to cover at least a part of the surface of the conductivepattern; a circuit element fixed above the conductive pattern; and aninsulating resin covering the circuit element to integrally support theconductive pattern bonded to the thermosetting resin layer.
 2. Thecircuit device as claimed in claim 1, wherein the thermosetting resinlayer is provided between the circuit element and the conductivepattern.
 3. The circuit device as claimed in claim 1, wherein the backof the conductive pattern is exposed out to form external electrodes. 4.The circuit device as claimed in claim 1, wherein the circuit element isfixed on a desired region of the conductive pattern exposed from thethermosetting resin layer.
 5. The circuit device as claimed in claim 1,further comprising: a second conductive pattern formed on thethermosetting resin layer and connected to the conductive pattern atdesired sites; wherein the circuit element is fixed on the secondconductive pattern while insulated from the second conductive pattern;and wherein the insulating resin integrally supports the conductivepattern and the second conductive pattern.
 6. The circuit device asclaimed in claim 1, wherein the insulating resin covers the circuitelement and bonds to the thermosetting resin layer to integrally supportthe conductive pattern with the back alone of the conductive patternbeing exposed out.
 7. The circuit device as claimed in claim 1, furthercomprising a connecting means for connecting the electrodes of thecircuit element to the other conductive pattern.
 8. The circuit deviceas claimed in claim 1, wherein the conductive pattern is formed ofconductive foil of any of copper, aluminum or iron-nickel.
 9. Thecircuit device as claimed in claim 1, wherein a conductive film of ametal material that differs from the material of the conductive patternis provided on a desired region of the conductive pattern exposed fromthe thermosetting resin layer.
 10. The circuit device as claimed inclaim 9, wherein the conductive film is formed of a plating layer ofgold, silver or palladium.
 11. The circuit device as claimed in claim 1,wherein the circuit element comprises either one or both of a baresemiconductor chip and a chip circuit part.
 12. The circuit device asclaimed in claim 7, wherein the connecting means is formed of a bondingwire.
 13. The circuit device as claimed in claim 1, wherein the back ofthe conductive pattern and the back of the thermosetting resin layerthat fills the isolation trench are substantially flattened.
 14. Thecircuit device as claimed in claim 1, wherein the conductive pattern isused for electrodes and bonding pads. 15-34. (canceled)
 35. A circuitdevice comprising: multiple conductive pattern for element mountingthereon; a circuit element fixed above at least a part of the conductivepattern; a conductive adhesion means for connecting the conductivepattern to the circuit element and adhering the conductive pattern andthe circuit element; an insulating resin that covers the circuit elementto integrally support the conductive pattern and the circuit element.36. A method for manufacturing circuit devices, comprising the step of:preparing conductive foil; forming multiple conductive pattern forelement mounting thereon; fixing a circuit element to at least a part ofthe conductive pattern via a conductive adhesion means electricallyconnecting the two and adhering the two; and providing an insulatingresin to seal the circuit element and the conductive pattern.